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NASA NTRS ยท 19780000158

Analyzing CMOS/SOS fabrication for LSI arrays

Abstract

Report discusses set of design rules that have been developed as result of work with test arrays. Set of optimum dimensions is given that would maximize process output and would correspondingly minimize costs in fabrication of large-scale integration (LSI) arrays.

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BibTeXRIS

Ipri, A. C.. 1978-10-01. Analyzing CMOS/SOS fabrication for LSI arrays. https://ntrs.nasa.gov/citations/19780000158

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