Digital data reformatter/deserializer

Abstract

A method and apparatus is presented for reformatting and de-serializing a serially-received sequence of data words, each consisting of a fixed number of binary data bits. A block of nm bits is serially fed into a shift register or serially-connected group of shift registers. In lieu of the(nm-1)th shifts, the bits are rearranged within the shift register in parallel fashion, according to a prescribed scheme. Shifting then continues, until the first bit of each data word appears in the last bit position in the shift register, at which time that data word is shifted in parallel into an output buffer stage, from which it is outputted in parallel, after a fixed delay.