NASA NTRS ยท 19810017822
Decommutator patchboard verifier
Abstract
A system for automatically verifying the connections between terminals of a patchboard is described. The system includes a back plane having a plurality of plugs corresponding to the pins of the patchboard. A number of decoders are connected to the plugs of the back plane so that a signal can be sequentially applied to each plug of the back plane under control of a stepping register and a control circuit. A plurality of data selectors are also connected to the plugs of the back plane and under control of a second external register. This control circuit sequentially makes connections between an output circuit and the plugs of the back plane so as to patch the signal applied to a respective plug through a patch connection to the output circuit. The precise locations of the patches on the patchboard can be identified and compared with previously stored information in a memory unit.
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Brunson, J. W.. 1981-05-12. Decommutator patchboard verifier. https://ntrs.nasa.gov/citations/19810017822
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