NASA NTRS ยท 19830011214
RS-232 communications analyzer module for HP-1602A logic analyzer
Abstract
The design and construction of a simple ASCII analyzer is described. It was built to interface directly to a Hewlett-Packard 1602A logic state analyzer but the circuitry could easily be configured to operate with any logic analyzer. The design of the ASCII analyzer allows the use of all the trace and delay functions for the HF-1602A. The ASCII analyzer circuit utilizes two universal Asynchronous Receiver/Transmitters (UAR/Ts) to simultaneously examine both the transmit and receive serial data lines. Baud rates from 300 to 9600 bits per second are selectable with the externally mounted DIP switch. The unit requires no external power supply connection and all of the integrated circuits are CMOS for low power consumption.
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Yost, S. R.. 1983-02-01. RS-232 communications analyzer module for HP-1602A logic analyzer. https://ntrs.nasa.gov/citations/19830011214
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