NASA NTRS · 19840026127
Validation of a fault-tolerant clock synchronization system
Abstract
A validation method for the synchronization subsystem of a fault tolerant computer system is investigated. The method combines formal design verification with experimental testing. The design proof reduces the correctness of the clock synchronization system to the correctness of a set of axioms which are experimentally validated. Since the reliability requirements are often extreme, requiring the estimation of extremely large quantiles, an asymptotic approach to estimation in the tail of a distribution is employed.
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Butler, R. W., Johnson, S. C.. 1984-09-01. Validation of a fault-tolerant clock synchronization system. https://ntrs.nasa.gov/citations/19840026127
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