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NASA NTRS · 19880000333

Designing Estimator/Predictor Digital Phase-Locked Loops

Abstract

Signal delays in equipment compensated automatically. New approach to design of digital phase-locked loop (DPLL) incorporates concepts from estimation theory and involves decomposition of closed-loop transfer function into estimator and predictor. Estimator provides recursive estimates of phase, frequency, and higher order derivatives of phase with respect to time, while predictor compensates for delay, called "transport lag," caused by PLL equipment and by DPLL computations.

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BibTeXRIS

Statman, J. I., Hurd, W. J.. 1988-06-01. Designing Estimator/Predictor Digital Phase-Locked Loops. https://ntrs.nasa.gov/citations/19880000333

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