Hardware realization of a baseband processor for a SS-FDMA/TDMA/DAMA system

Abstract

Hardware implementation of the NASA ACTS baseband processor is described which achieves the system message data handling performance required to perform satellite switching of high-rate baseband data. The hardware meets payload specifications for size, weight, and power. Hardware redundancy applied to critical paths in several functional areas insures that the reliability and life expectancy requirements are fulfilled. The remote reprogrammability of the processor message data handling and routing functions provides system flexibility for dynamic reconfiguration during rapidly changing traffic loads.