NASA NTRS · 19940016633
Fault detection in digital and analog circuits using an i(DD) temporal analysis technique
Abstract
An i(sub DD) temporal analysis technique which is used to detect defects (faults) and fabrication variations in both digital and analog IC's by pulsing the power supply rails and analyzing the temporal data obtained from the resulting transient rail currents is presented. A simple bias voltage is required for all the inputs, to excite the defects. Data from hardware tests supporting this technique are presented.
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Beasley, J., Magallanes, D., Vridhagiri, A., Ramamurthy, Hema, Deyong, Mark. 1993-01-01. Fault detection in digital and analog circuits using an i(DD) temporal analysis technique. https://ntrs.nasa.gov/citations/19940016633
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