NASA NTRS · 19940016654
A unified approach to VLSI layout automation and algorithm mapping on processor arrays
Abstract
Development of software tools for designing supercomputing systems is highly complex and cost ineffective. To tackle this a special purpose PAcube silicon compiler which integrates different design levels from cell to processor arrays has been proposed. As a part of this, we present in this paper a novel methodology which unifies the problems of Layout Automation and Algorithm Mapping.
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Venkateswaran, N., Pattabiraman, S., Srinivasan, Vinoo N.. 1993-01-01. A unified approach to VLSI layout automation and algorithm mapping on processor arrays. https://ntrs.nasa.gov/citations/19940016654
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