NASA NTRS · 19970014227
Implementation and Performance of GaAs Digital Signal Processing ASICs
Abstract
The feasibility of performing high speed digital signal processing in GaAs gate array technology has been demonstrated with the successful implementation of a VLSI communications chip set for NASA's Deep Space Network. This paper describes the techniques developed to solve some of the technology and implementation problems associated with large scale integration of GaAs gate arrays.
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Whitaker, William D., Buchanan, Jeffrey R., Burke, Gary R., Chow, Terrance W., Graham, J. Scott, Kowalski, James E., Lam, Barbara, Siavoshi, Fardad, Thompson, Matthew S., Johnson, Robert A.. 1993-05-01. Implementation and Performance of GaAs Digital Signal Processing ASICs. https://ntrs.nasa.gov/citations/19970014227
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