NASA NTRS · 20000072486
Integrated Circuit Immunity
Abstract
This paper presents a DOD E3 program overview on integrated circuit immunity. The topics include: 1) EMI Immunity Testing; 2) Threshold Definition; 3) Bias Tee Function; 4) Bias Tee Calibration Set-Up; 5) EDM Test Figure; 6) EMI Immunity Levels; 7) NAND vs. and Gate Immunity; 8) TTL vs. LS Immunity Levels; 9) TP vs. OC Immunity Levels; 10) 7805 Volt Reg Immunity; and 11) Seventies Chip Set. This paper is presented in viewgraph form.
Keep this discovery
Explore connections, maps & timelines
Sketoe, J. G., Clark, Anthony. 2000-01-01. Integrated Circuit Immunity. https://ntrs.nasa.gov/citations/20000072486
Cite the original work for its findings. Save a collection to share your selection of sources.