Atomically Flat Surfaces Developed for Improved Semiconductor Devices

Abstract

New wide bandgap semiconductor materials are being developed to meet the diverse high temperature, -power, and -frequency demands of the aerospace industry. Two of the most promising emerging materials are silicon carbide (SiC) for high-temperature and high power applications and gallium nitride (GaN) for high-frequency and optical (blue-light-emitting diodes and lasers) applications. This past year Glenn scientists implemented a NASA-patented crystal growth process for producing arrays of device-size mesas whose tops are atomically flat (i.e., step-free). It is expected that these mesas can be used for fabricating SiC and GaN devices with major improvements in performance and lifetime. The promising new SiC and GaN devices are fabricated in thin-crystal films (known as epi films) that are grown on commercial single-crystal SiC wafers. At this time, no commercial GaN wafers exist. Crystal defects, known as screw defects and micropipes, that are present in the commercial SiC wafers propagate into the epi films and degrade the performance and lifetime of subsequently fabricated devices. The new technology isolates the screw defects in a small percentage of small device-size mesas on the surface of commercial SiC wafers. This enables atomically flat surfaces to be grown on the remaining defect-free mesas. We believe that the atomically flat mesas can also be used to grow GaN epi films with a much lower defect density than in the GaN epi films currently being grown. Much improved devices are expected from these improved low-defect epi films. Surface-sensitive SiC devices such as Schottky diodes and field effect transistors should benefit from atomically flat substrates. Also, we believe that the atomically flat SiC surface will be an ideal surface on which to fabricate nanoscale sensors and devices. The process for achieving atomically flat surfaces is illustrated. The surface steps present on the "as-received" commercial SiC wafer is also illustrated. because of the small tilt angle between the crystal "basal" plane and the polished wafer surface. These steps are used in normal SiC epi film growth in a process known as stepflow growth to produce material for device fabrication. In the new process, the first step is to etch an array of mesas on the SiC wafer top surface. Then, epi film growth is carried out in the step flow fashion until all steps have grown themselves out of existence on each defect-free mesa. If the size of the mesas is sufficiently small (about 0.1 by 0.1 mm), then only a small percentage of the mesas will contain an undesired screw defect. Mesas with screw defects supply steps during the growth process, allowing a rough surface with unwanted hillocks to form on the mesa. The improvement in SiC epi surface morphology achievable with the new technology is shown. An atomic force microscope image of a typical SiC commercial epilayer surface is also shown. A similar image of an SiC atomically flat epi surface grown in a Glenn laboratory is given. With the current screw defect density of commercial wafers (about 5000 defects/cm2), the yield of atomically free 0.1 by 0.l mm mesas is expected to be about 90 percent. This is large enough for many types of electronic and optical devices. The implementation of this new technology was recently published in Applied Physics Letters. This work was initially carried out in-house under a Director's Discretionary Fund project and is currently being further developed under the Information Technology Base Program.