Reconfigurable Advanced Receiver Design and Implementation

Abstract

While the demand for real-time broadband information access has grown and continues to grow at a rapid Pace, the need for a reconfigurable receiver system has increased. To achieve the goal to communicate with multiple shuttles at a time, a filter bank in polyphase structure is introduced. This paper presents the design and implementation for high-speed, high-performance, and fixed-point polyphase filter banks. The polyphase filter structure is designed such that the use of a fixed-point system has minimum impact on the performance of the filter. The final hardware implementation is done on a Xilinx FPGA chip.