NASA NTRS · 20060044226
On-board fault-tolerant SAR processor for spaceborne imaging radar systems
Abstract
A real-time high-performance and fault-tolerant FPGA-based hardware architecture for the processing of synthetic aperture radar (SAR) images has been developed for advanced spaceborne radar imaging systems. In this paper, we present the integrated design approach, from top-level algorithm specifications, system architectures, design methodology, functional verification, performance validation, down to hardware design and implementation.
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Fang, Wai-Chi, Le, Charles, Taft, Stephanie. 2005-05-21. On-board fault-tolerant SAR processor for spaceborne imaging radar systems. https://ntrs.nasa.gov/citations/20060044226
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