NASA NTRS · 20110015039
Multifunctional Logic Gate Controlled by Temperature
Abstract
A complementary metal oxide/semiconductor (CMOS) electronic circuit has been designed to function as a NAND gate at a temperature between 0 and 80 deg C and as a NOR gate at temperatures from 120 to 200 C. In the intermediate temperature range of 80 to 120 C, this circuit is expected to perform a function intermediate between NAND and NOR with degraded noise margin. The process of designing the circuit and the planned fabrication and testing of the circuit are parts of demonstration of polymorphic electronics a technological discipline that emphasizes designing the same circuit to perform different analog and/or digital functions under different conditions. In this case, the different conditions are different temperatures.
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Stoica, Adrian, Zebulum, Ricardo. 2005-07-01. Multifunctional Logic Gate Controlled by Temperature. https://ntrs.nasa.gov/citations/20110015039
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