2.5/3D Daisy Chain Reliability Evaluation

Abstract

The objective of this task is to evaluate thermal cycle behavior of advanced 2.5/3D electronics — commercial-off the-shelf (COTS) —packages of different configurations assembled onto printed circuit boards (PCBs). Three key approaches were considered for evaluation. The first approach focused on the through-mold via (TMV™) technology at assembly level. The second approach focused on evaluation of 2.5D (also known as, System in Package (SiP)) in fine pitch ball grid array (FPGA). The third approach focused on evaluation of through-silicone-via (TSV) technologies. This report presents the test results for TMV™ and SiP packaging technologies and reliability, and it also provides lessons learned on quality assurance methods. Specifically, the report presents the test matrix for various 3D TMV™ packaging assembly configurations and reliability characterizations performed under two accelerated thermal cycling (ATC) and accelerated thermal shock cycling (ATSC) conditions. The ATC and ATSC were performed in the range of –55°C to 125°C and –100°C to 100°C, respectively. The report also includes assembly of a SiP— a 60-mm fine-pitch ball-grid array (FPGA) interposer with an IC at the center and six chip-scale package (CSP) daisy chains at the periphery—with package assembly characterizations. After assembly, the daisy chains were subjected to ATCs in the range of –40°C to 125°C for reliability evaluation. Finally, for both TMV™ and SiP packaging configurations, characterizations results by X-ray, optical imaging, and daisy-chain resistance evaluations were also presented.