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DOE OSTI · 1092967

Hardware packet pacing using a DMA in a parallel computer

Chen, Dong·Heidelberger, Phillip·Vranas, Pavlos
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Abstract

Method and system for hardware packet pacing using a direct memory access controller in a parallel computer which, in one aspect, keeps track of a total number of bytes put on the network as a result of a remote get operation, using a hardware token counter.

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97 MATHEMATICS AND COMPUTING

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Chen, Dong, Heidelberger, Phillip, Vranas, Pavlos. 2013-08-13. Hardware packet pacing using a DMA in a parallel computer. https://www.osti.gov/biblio/1092967

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