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DOE OSTI · 1093265

Extensible packet processing architecture

Robertson, Perry J.·Hamlet, Jason R.·Pierson, Lyndon G.·Olsberg, Ronald R.·Chun, Guy D.
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Abstract

A technique for distributed packet processing includes sequentially passing packets associated with packet flows between a plurality of processing engines along a flow through data bus linking the plurality of processing engines in series. At least one packet within a given packet flow is marked by a given processing engine to signify by the given processing engine to the other processing engines that the given processing engine has claimed the given packet flow for processing. A processing function is applied to each of the packet flows within the processing engines and the processed packets are output on a time-shared, arbitered data bus coupled to the plurality of processing engines.

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BibTeXRIS

Robertson, Perry J., Hamlet, Jason R., Pierson, Lyndon G., Olsberg, Ronald R., Chun, Guy D.. 2013-08-20. Extensible packet processing architecture. https://www.osti.gov/biblio/1093265

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