High speed, multi-channel, user programmable digital data acquisition system.

Abstract

As applications for radiation detection become more demanding, and in turn improvements are made in the technology of radiation detection, there is a need for high speed digital detector readout electronics matching these improvements. Specifically, full control over the on-line processing resources of modern digital electronics is desirable so that researchers can develop custom algorithms for special applications.In the proposed effort, the 500 MHz digital readout electronics previously developed by our company will be redesigned to allow user access to the on-line processing resources. In Phase I, the division of online processing into vendor and user firmware sections has been studied on existing hardware. In Phase II, the hardware will be upgraded to better facilitate the division, and the firmware will be restructured into a robust vendor logic block (providing standard functions such as host I/O, on-board memory I/O, energy computation, MCA spectra, timestamps, waveform capture, run statistics, and triggering and timing) and a user logic block for custom algorithms (with templates and examples for frequently used functions). Investigating several options to divide online processing, it was determined that the most promising approach is to “partition” a single FPGA integrated circuit into a vendor and user section, which is supported in newer devices. The analog front end of the existing electronics proved suitable for most applications, in particular high rate measurements with germanium detectors. The design architecture for new electronics was developed, combining one of the new FPGA device with the analog front end.