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DOE OSTI · 1417449

Reverse Engineering Integrated Circuits Using Finite State Machine Analysis

Oler, Kiri J.·Miller, Carl H.
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Abstract

In this paper, we present a methodology for reverse engineering integrated circuits, including a mathematical verification of a scalable algorithm used to generate minimal finite state machine representations of integrated circuits.

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97 MATHEMATICS AND COMPUTINGfinite state machineintegrated circuitreverse engineering

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Oler, Kiri J., Miller, Carl H.. 2016-04-12. Reverse Engineering Integrated Circuits Using Finite State Machine Analysis. https://doi.org/10.2172/1417449

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