Memory node controller

Beard, Jonathan Curtis; Rusitoru, Roxana; Dunham, Curtis Glenn

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DOE OSTI · 1600250

Memory node controller

Beard, Jonathan Curtis·Rusitoru, Roxana·Dunham, Curtis Glenn

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Abstract

A memory node controller for a node of a data processing network, the network including at least one computing device and at least one data resource, each data resource addressed by a physical address. The node is configured to couple the at least one computing device with the at least one data resource. Elements of the data processing network are addressed via a system address space. The memory node controller includes a first interface to the at least one data resource, a second interface to the at least one computing device, and a system to physical address translator cache configured to translate a system address in the system address space to a physical address in the physical address space of the at least one data resource.

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BibTeX RIS

Beard, Jonathan Curtis, Rusitoru, Roxana, Dunham, Curtis Glenn. 2019-11-05. Memory node controller. https://www.osti.gov/biblio/1600250

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