Network Reduction for Power Hardware-in-the-Loop (PHIL) Simulation

Abstract

This paper proposes single-port equivalent and two-port equivalent network reduction methods to respectively reduce single-port and two-port areas in a large power network. Parameters of the reduced systems are rigorously derived, which guarantees that the electrical quantities at the port(s) remain unchanged over the reduction, including voltage magnitude and phase and active and reactive power injections into the area to be reduced. The proposed techniques are applied to reduce a practical Maui grid, where the total numbers of buses, lines and transformers are respectively reduced from 212, 106 and 108 to 45, 30 and 13. Dynamic behaviors between the full model and the reduced model are compared in detail to illustrate the efficacy and accuracy of the proposed network reduction.