Practical verification protocols for analog quantum simulators

Abstract

Abstract Analog quantum simulation is expected to be a significant application of near-term quantum devices. Verification of these devices without comparison to known simulation results will be an important task as the system size grows beyond the regime that can be simulated classically. We introduce a set of experimentally-motivated verification protocols for analog quantum simulators, discussing their sensitivity to a variety of error sources and their scalability to larger system sizes. We demonstrate these protocols experimentally using a two-qubit trapped-ion analog quantum simulator and numerically using models of up to five qubits.