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DOE OSTI · 1860740

Porting hypre to heterogeneous computer architectures: Strategies and experiences

Abstract

We report that linear systems are occurring in many applications, and solving them can take a large amount of the total simulation time. The high performance library hypre provides a variety of interfaces and linear solvers, including various multigrid methods, that have achieved good scalability on a variety of homogeneous parallel computer architectures. Heterogeneous architectures with nodes that have both CPUs and accelerators provide new challenges, since they require more fine-grained parallelism and reduced data movement between different memories on a single node as well as across nodes. We will discuss our experiences and strategies to port hypre to heterogeneous computers with accelerators, including the design of a new memory model, the use of abstractions, the BoxLoop macros in the structured and semi-structured interfaces, and the restructuring of algebraic multigrid (AMG) into modular components. We present numerical experiments comparing CPU and GPU performance for several test problems.

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BibTeXRIS

Falgout, Robert D., Li, Ruipeng, Sjögreen, Björn, Wang, Lu, Yang, Ulrike Meier. 2021-09-20. Porting hypre to heterogeneous computer architectures: Strategies and experiences. https://doi.org/10.1016/j.parco.2021.102840

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