DOE OSTI · 1925075
Offset-aligned three-dimensional integrated circuit
Abstract
A method for manufacturing a three-dimensional integrated circuit includes attaching a first side of a first die to a first carrier wafer. The method includes preparing a second side of the first die to generate a prepared second side of the first die. The method includes attaching the prepared second side of the first die to a second carrier wafer. The method includes removing the first carrier wafer from the first side of the first die to form a transitional three-dimensional integrated circuit. The method includes attaching a third carrier wafer to a first side of the transitional three-dimensional integrated circuit. The method includes attaching a first side of the second die to a second side of the transitional three-dimensional integrated circuit.
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Wilkerson, Brett P., Bhagavat, Milind S., Agarwal, Rahul, Yudanov, Dmitri. 2022-09-06. Offset-aligned three-dimensional integrated circuit. https://www.osti.gov/biblio/1925075
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