DOE OSTI · 1983794
The CMOS Pseudo-Thyristor: a zero-static current discriminator circuit
Abstract
We report a very low power discriminator circuit for pixelized detectors, called the Pseudo-Thyristor is described in this document. It is a positive feedback topology using regular PMOS and NMOS field-effect transistors (FET's) with zero static current. When a small charge is injected into the circuit, it flips rapidly due to the positive feedback and outputs a logic transition for further digitization. Simulation shows that in a 65 nm process, it is possible to achieve a detecting threshold below 5 fC while maintain the average power consumption below 10 micro-Watts when the hit occupancy is <10% for 40 MHz operation.
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Wen, X., Fu, T., Gong, D., Huang, X., Liu, T., Gui, P., Wu, J.. 2024-04-16. The CMOS Pseudo-Thyristor: a zero-static current discriminator circuit. https://doi.org/10.1088/1748-0221%2F19%2F04%2Fc04034
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