DOE OSTI · 2570267
SPARTA: High-Level Synthesis of Parallel Multi-Threaded Accelerators
Abstract
This article presents a methodology for the Synthesis of PARallel multi-Threaded Accelerators (SPARTA) from OpenMP annotated C/C++ specifications. SPARTA extends an open-source HLS tool, enabling the generation of accelerators that provide latency tolerance for irregular memory accesses through multithreading, support fine-grained memory-level parallelism through a hot-potato deflection-based network-on-chip (NoC), support synchronization constructs, and can instantiate memory-side caches. Our approach is based on a custom runtime OpenMP library, providing flexibility and extensibility. Experimental results show high scalability when synthesizing irregular graph kernels. The accelerators generated with our approach are, on average, 2.29x faster than state-of-the-art HLS methodologies.
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Gozzi, Giovanni [Politecnico di Milano (Italy)] (ORCID:0009000963115458), Fiorito, Michele [Politecnico di Milano (Italy)] (ORCID:0000000186756703), Curzel, Serena [Politecnico di Milano (Italy)] (ORCID:0000000282021627), Barone, Claudio [Pacific Northwest National Laboratory (PNNL), Richland, WA (United States)] (ORCID:0009000979918554), Castellana, Vito Giovanni [Pacific Northwest National Laboratory (PNNL), Richland, WA (United States)] (ORCID:0000000335167903), Minutoli, Marco [Pacific Northwest National Laboratory (PNNL), Richland, WA (United States)] (ORCID:0000000242201420), Tumeo, Antonino [Pacific Northwest National Laboratory (PNNL), Richland, WA (United States)] (ORCID:000000019452120X), Ferrandi, Fabrizio [Politecnico di Milano (Italy)] (ORCID:0000000303014419). 2024-12-25. SPARTA: High-Level Synthesis of Parallel Multi-Threaded Accelerators. https://doi.org/10.1145/3677035
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