Increasing Radon Daughter Plate-out onto Superconducting Qubits

Abstract

Radon daughter plate-out may pose a fundamental limitation to realizing large-scale superconducting quantum computers. Radon daughters plated-out on a superconducting qubit can decay, releasing energy into the substrate, producing phonons. Phonon-induced quasiparticles then generate bit-flip errors and reduce coherence times. We seek to increase plate-out on chips to enable future study of the impact of radon on coherence times. In this project, we utilize COMSOL Multiphysics simulations to visualize electric field configuration and model ion transport to finalize design of a device to increase radon plate-out on qubit chips.