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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 181 records · Page 10

Mixed Linear/Square-Root Encoded Single Slope Ramp Provides a Fast, Low Noise Analog to Digital Converter with Very High Linearity for Focal Plane Arrays

An analog-to-digital converter (ADC) converts pixel voltages from a CMOS image into a digital output. A voltage ramp generator generates a voltage ramp that has a linear first portion and a non-linear second portion. A digital output generator generates a digital output based on the voltage ramp, the pixel voltages, and comparator output from an array of comparators that compare the voltage ramp to the pixel voltages. A return lookup table linearizes the digital output values.

Wrigley, Christopher James↗

Wideband Spectroscopy: The Design and Implementation of a 3 GHz Bandwidth, 8192 Channel, Polyphase Digital Spectrometer

A family of state-of-the-art digital Fourier transform spectrometers has been developed, with a combination of high bandwidth and fine resolution unavailable elsewhere. Analog signals consisting of radiation emitted by constituents in planetary atmospheres or galactic sources are downconverted and subsequently digitized by a pair of interleaved Analog-to-Digital Converters, (ADC). This 6 Gsps (giga-sample per second) digital representation of the analog signal is then processed through an FPGA-based streaming Fast Fourier Transform (FFT), the key development described below. Digital spectrometers have many advantages over previously used analog spectrometers, especially in terms of accuracy and resolution, both of which are particularly important for the type of scientific questions to be addressed with next-generation radiometers. the implementation, results and underlying math for this spectrometer, as well as, potential for future extension to even higher bandwidth, resolution and channel orthogonality, needed to support proposed future advanced atmospheric science and radioastronomy, are discussed.

field programmable gate array↗

Wideband Spectroscopy: The Design and Implementation of a 3 GHz, 2048 Channel Digital Spectrometer

A state-of-the-art digital Fourier Transform spectrometer has been developed, with a combination of high bandwidth and fine resolution unavailable elsewhere. Analog signals consisting of radiation emitted by constituents in planetary atmospheres or galactic sources are downconverted and subsequently digitized by a pair of interleaved Analog-to-Digital Converters (ADC). This 6 Gsps (giga sample per second) digital representation of the analog signal is then processed through an FPGA-based streaming Fast Fourier Transform (FFT), the key development described below. Digital spectrometers have many advantages over previously used analog spectrometers, especially in terms of accuracy and resolution, both of which are particularly important for the type of scientific questions to be addressed with next-generation radiometers. The implementation, results and underlying math for this spectrometer, as well as potential for future extension to even higher bandwidth, resolution and channel orthogonality, needed to support proposed future advanced atmospheric science and radioastronomy, are discussed.

field programmable gate array↗

DESDynI Quad First Stage Processor - A Four Channel Digitizer and Digital Beam Forming Processor

The proposed Deformation, Eco-Systems, and Dynamics of Ice Radar (DESDynI-R) L-band SAR instrument employs multiple digital channels to optimize resolution while keeping a large swath on a single pass. High-speed digitization with very fine synchronization and digital beam forming are necessary in order to facilitate this new technique. The Quad First Stage Processor (qFSP) was developed to achieve both the processing performance as well as the digitizing fidelity in order to accomplish this sweeping SAR technique. The qFSP utilizes high precision and high-speed analog to digital converters (ADCs), each with a finely adjustable clock distribution network to digitize the channels at the fidelity necessary to allow for digital beam forming. The Xilinx produced FX130T Virtex 5 part handles the processing to digitally calibrate each channel as well as filter and beam form the receive signals. Demonstrating the digital processing required for digital beam forming and digital calibration is instrumental to the viability of the proposed DESDynI instrument. The qFSP development brings this implementation to Technology Readiness Level (TRL) 6. This paper will detail the design and development of the prototype qFSP as well as the preliminary results from hardware tests.

Chuang, Chung-Lun↗

Hardware in the Loop Testing of an Iodine-Fed Hall Thruster

CUBESATS are relatively new spacecraft platforms that are typically deployed from a launch vehicle as a secondary payload,1 providing low-cost access to space for a wide range of end-users. These satellites are comprised of building blocks having dimensions of 10x10x10 cm cu and a mass of 1.33 kg (a 1-U size). While providing low-cost access to space, a major operational limitation is the lack of a propulsion system that can fit within a CubeSat and is capable of executing high delta v maneuvers. This makes it difficult to use CubeSats on missions requiring certain types of maneuvers (i.e. formation flying, spacecraft rendezvous). Recently, work has been performed investigating the use of iodine as a propellant for Hall-effect thrusters (HETs) 2 that could subsequently be used to provide a high specific impulse path to CubeSat propulsion. Iodine stores as a dense solid at very low pressures, making it acceptable as a propellant on a secondary payload. It has exceptionally high ρIsp (density times specific impulse), making it an enabling technology for small satellite near-term applications and providing the potential for systems-level advantages over mid-term high power electric propulsion options. Iodine flow can also be thermally regulated, subliming at relatively low temperature ( less than100 C) to yield I2 vapor at or below 50 torr. At low power, the measured performance of an iodine-fed HET is very similar to that of a state-of-the-art xenon-fed thruster. Just as importantly, the current-voltage discharge characteristics of low power iodine-fed and xenon-fed thrusters are remarkably similar, potentially reducing development and qualifications costs by making it possible to use an already-qualified xenon-HET PPU in an iodine-fed system. Finally, a cold surface can be installed in a vacuum test chamber on which expended iodine propellant can deposit. In addition, the temperature doesn't have to be extremely cold to maintain a low vapor pressure in the vacuum chamber (it is under 10(exp -6) torr at -75 C), making it possible to 'cryopump' the propellant with lower-cost recirculating refrigerant-based systems as opposed to using liquid nitrogen or low temperature gaseous helium cryopanels. In the present paper, we describe testing performed using an iodine-fed 200 W Hall thruster mounted to a thrust stand and operated in conjunction with MSFCs Small Projects Rapid Integration and Test Environment (SPRITE) Portable Hardware In the Loop (PHIL) hardware. This work is performed in support of the iodine satellite (iSAT) project, which aims to fly a 200-W iodine-fed thruster on a 12-U CubeSat. The SPRITE PHIL hardware allows a given vehicle to do a checkout of its avionics algorithm by allowing it to monitor and feed data to simulated sensors and effectors in a digital environment. These data are then used to determine the attitude of the vehicle and a separate computer is used to interpret the data set and visualize it using a 3D graphical interface. The PHIL hardware allows the testing of the vehicles bus by providing 'real' hardware interfaces (in the case of this test a real RS422 bus) and specific components can be modeled to show their interactions with the avionics algorithm (e.g. a thruster model). For the iSAT project the PHIL is used to visualize the operating cycle of the thruster and the subsequent effect this thrusting has on the attitude of the satellite over a given period of time. The test is controlled using software running on an Andrews Space Cortex 160 flight computer. This computer is the current baseline for a full iSAT mission. While the test could be conducted with a lab computer and software, the team chose to exercise the propulsion system with a representative CubeSat-class computer. For purposes of this test, the "flight" software monitored the propulsion and PPU systems, controlled operation of the thruster, and provided thruster state data to the PHIL simulation. Commands to operate the thruster were initiated from an operator's workstation outside the vacuum chamber and passed through the Cortex 160 to exercise portions of the flight avionics. Two custom-designed pieces of electronics hardware have been designed to operate the propellant feed system. One piece of hardware is an auxiliary board that controls a latch valve, proportional flow control valves (PFCVs) and valve heaters as well as measuring pressures, temperatures and PFCV feedback voltage. An onboard FPGA provides a serial link for issuing commands and manages all lower level input-output functions. The other piece of hardware is a power distribution board, which accepts a standard bus voltage input and converts this voltage into all the different current-voltage types required to operate the auxiliary board. These electronics boards are located in the vacuum chamber near the thruster, exposing this hardware to both the vacuum and plasma environments they would encounter during a mission, with these components communicating to the flight computer through an RS-422 interface. The auxiliary board FPGA provides a 28V MOSFET switch circuit with a 20ms pulse to open or close the iodine propellant feed system latch valve. The FPGA provides a pulse width modulation (PWM) signal to a DC/DC boost converter to produce the 12-120V needed for control of the proportional flow control valve. There are eight MOSFET-switched heating circuits in the system. Heaters are 28V and located in the latch valve, PFCV, propellant tank and propellant feed lines. Both the latch valve and PFCV have thermistors built into them for temperature monitoring. There are also seven resistance temperature device (RTD) circuits on the auxiliary board that can be used to measure the propellant tank and feedline temperatures. The signals are conditioned and sent to an analog to digital converter (ADC), which is directly commanded and controlled by the FPGA.

Polzin, Kurt A.↗

Characterization of Oribtal Debris via Hyper-Velocity Ground-Based Tests

Existing DoD and NASA satellite breakup models are based on a key laboratory-based test, Satellite Orbital debris Characterization Impact Test (SOCIT), which has supported many applications and matched on-orbit events involving older satellite designs reasonably well over the years. In order to update and improve the break-up models and the NASA Size Estimation Model (SEM) for events involving more modern satellite designs, the NASA Orbital Debris Program Office has worked in collaboration with the University of Florida to replicate a hypervelocity impact using a satellite built with modern-day spacecraft materials and construction techniques. The spacecraft, called DebriSat, was intended to be a representative of modern LEO satellites and all major designs decisions were reviewed and approved by subject matter experts at Aerospace Corporation. DebriSat is composed of 7 major subsystems including attitude determination and control system (ADCS), command and data handling (C&DH), electrical power system (EPS), payload, propulsion, telemetry tracking and command (TT&C), and thermal management. To reduce cost, most components are emulated based on existing design of flight hardware and fabricated with the same materials. All fragments down to 2 mm is size will be characterized via material, size, shape, bulk density, and the associated data will be stored in a database for multiple users to access. Laboratory radar and optical measurements will be performed on a subset of fragments to provide a better understanding of the data products from orbital debris acquired from ground-based radars and telescopes. The resulting data analysis from DebriSat will be used to update break-up models and develop the first optical SEM in conjunction with updates into the current NASA SEM. The characterization of the fragmentation will be discussed in the subsequent presentation.

Cowardin, H.↗

Characterization of Orbital Debris Via Hyper-Velocity Ground-Based Tests

To replicate a hyper-velocity fragmentation event using modern-day spacecraft materials and construction techniques to better improve the existing DoD and NASA breakup models. DebriSat is intended to be representative of modern LEO satellites.Major design decisions were reviewed and approved by Aerospace subject matter experts from different disciplines. DebriSat includes 7 major subsystems. Attitude determination and control system (ADCS), command and data handling (C&DH), electrical power system (EPS), payload, propulsion, telemetry tracking and command (TT&C), and thermal management. To reduce cost, most components are emulated based on existing design of flight hardware and fabricated with the same materials. A key laboratory-based test, Satellite Orbital debris Characterization Impact Test (SOCIT), supporting the development of the DoD and NASA satellite breakup models was conducted at AEDC in 1992 .Breakup models based on SOCIT have supported many applications and matched on-orbit events reasonably well over the years.

Cowardin, Heather↗

Design, Manufacture and Test of Cryotank Components

On the composite cryotank technology development (CCTD) project, the Boeing Company built two cryotanks as a means of advancing technology and manufacturing readiness levels (TRL and MRL) and lowering the risk of fabricating full-scale fuel containment vessels.1 CCTD focused on upper stage extended duration applications where long term storage of propellants is required. The project involved the design, analysis, fabrication, and test of manufacturing demonstration units (MDU), a 2.4 m (precursor) and a 5.5 m composite cryotank. Key design features included one-piece wall construction to minimize overall weight (eliminating the need for a bellyband joint), 3-dimensionally (3D) reinforced y-joint material to alleviate stress concentrations at the tank to skirt interface and a purge-able fluted core skirt to carry high axial launch loads. The tanks were made with OoA curing pre-impregnated (prepreg) carbon/epoxy (C/E) slit-tape tow (STT) that contained thin micro-crack resistant plies in the tank wall center to impede permeation. The tanks were fabricated at Boeing's Seattle-based Advanced Development Center (ADC) using RAFP and multipiece break-down tooling. The tooling was designed and built by Janicki Industries (JI) at Sedro Woolley, Washington. Tank assemblage consisted of co-bonded dome covers, one-piece fluted core skirts and mechanical fastened cover/sump. Ultrasonic inspection was performed after every cure or bond and a structural health monitoring system (SHMS) was installed to identify potential impact damage events (in-process and/or during transportation). The tanks were low temperature tested at NASA's George C. Marshall Space Flight Center (MSFC) in Huntsville, Alabama. The testing, which consisted of a sequence of fill/drain pressure and thermal cycles using LH2, was successfully concluded in 2012 on the 2.4 m tank and in 2014 on the 5.5 m tank. Structural, thermal, and permeation performance data was obtained. 2 Critical design features and manufacturing advancements, which helped to validate 25% weight and 30% cost reduction projections, were matured. These advancements will help to guide future composite tank integration activities on next generation long duration aircraft and space launch vehicles. Because CCTD addressed innovative design features, heavy lift size scale-up, multipiece captured tooling, new generation automated material placement (AMP) equipment and OoA materials, this chapter should be of interest to educators, students and manufacturers of composite hardware and flight vehicles.

McCarville, Douglas A.↗

Introduction to Multicasting

This is a presentation for students who will be participating in the App Development Challenge (ADC). This discussion tells the students the data format NASA will be using (which their software must be compatible with). This presentation contains only publicly available images and information, and is provided to help the students with their coding (that they will submit to NASA).

Hirsh, Robert↗

Development of Space-Flight Compatible Room-Temperature Electronics for the Lynx X-Ray Microcalorimeter

We are studying the development of space-flight compatible room-temperature electronics for the Lynx x-ray microcalorimeter (LXM) of the Lynx mission. The baseline readout technique for the LXM is microwave SQUID multiplexing. The key modules at room temperature are the RF electronics module and the digital electronics and event processor (DEEP). The RF module functions as frequency converters and mainly consists of local oscillators and I/Q mixers. The DEEP performs demultiplexing and event processing, and mainly consists of field-programmable gate arrays, ADCs, and DACs. We designed the RF electronics and DEEP to be flight ready, and estimated the power, size, and mass of those modules. There are two boxes each for the RF electronics and DEEP for segmentation, and the sizes of the boxes are 13 in: × 13 in: × 9 in: for the RF electronics and 15.5 in: × 11.5 in: × 9.5 in: for the DEEP. The estimated masses are 25.1 kg∕box for the RF electronics box and 24.1 kg∕box for the DEEP box. The maximum operating power for the RF electronics is 141 W or 70.5 W∕box, and for the DEEP box is 615 W or 308 W∕box. The overall power for those modules is 756 W. We describe the detail of the designs as well as the approaches to the estimation of resources, sizes, masses, and powers.

Sakai, Kazuhiro↗

Single-Event Latchup Measurements on COTS Electronic Devices for Use in ISS Payloads

This paper reports recent single-event latchup results for a variety of microelectronic devices that include an ADC, OpAmp, EEPROM, CPLD, PWM, transceiver, voltage regulator, digital signal processor, step-down converter, buck controller and supervisory circuits. The data were collected to evaluate these devices for possible use in NASA ISS payloads.

Irom, Farokh↗

Analysis of the Accuracy of Actuation Electronics in the Laser Interferometer Space Antenna Pathfinder

The Laser Interferometer Space Antenna Pathfinder (LPF) main observable, labelled∆g, is the differential force per unit mass acting on the two test masses in free fall condition, after the contribution of all non-gravitational forces have been compensated. At low frequencies the differential force is compensated by an applied electrostatic actuation force,which then must be subtracted from the measured acceleration to obtain∆g. Any inaccuracy in the actuation force contaminates the residual acceleration. This study investigates the accuracy of the electrostatic actuation system and its impact on the LPF main observable. It is shown that the inaccuracy is mainly caused by the rounding errors in the waveform processing and also by the random error caused by the analog to digital converter (ADC) random noise in the control loop. Both errors are one order of magnitude smaller than the resolution of the commanded voltages. We developed a simulator based on the LPF design to compute the close-to-reality actuation voltages and consequently, the resulting actuation forces. The simulator is applied in post-processing the LPF data.

M. Armano↗

Vorago RH-OBC-1 Single Event Effect Characterization Test Report

The Vorago Technologies RH-OBC-1 is a CubeSat Kit Bus compatible single board computer with a Vorago VA10820 ARM Cortex-M0 microcontroller at its core. The board also includes a set of common peripheral integrated circuits, like voltage regulators, non-volatile memories (NVM), an analog-to-digital converter (ADC), a watchdog/supervisor, and a Controller Area Network (CAN) bus transceiver. High-energy proton (200 MeV) testing was conducted at both board and component levels to investigate single-event effects.

CubeSat compatible board↗

Preliminary Design and Implementation of the Baseline Digital Baseband Architecture for Advanced Deep Space Transponders

This article investigates and identifies the baseline design and implementation of the digital baseband architecture for advanced deep space transponders. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described.

Deep↗

Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits

At HiTEC2018, NASA Glenn Research Center reported the first demonstration of yearlong 500°C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021submissionupdateson-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11and near 3000 transistors/chip for Gen. 12 aremade possibleby reductions in minimum layout feature sizes (including resistorwidth shrinkage from 6 μm to 2μm) coupled with enlarged die size (from 3x3 mm to 5x5mm). Gen. 11 ICs electrically tested to date include an 8-bit delta-sigma analog to digital converter (ADC) as well as upscaled random access memory (RAM)and nearly 1 kbit read only memory (ROM). However, Gen. 11 prototype ICs exhibited significantly lower yield and durability than Gen. 10 ICs. Development of revised processing is being investigated towards mitigating these issues in subsequentGen. 12 fabrication runcurrentlyin progress.

Silicon Carbide↗

Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits

At HiTEC 2018, NASA Glenn Research Center reported the first demonstration of yearlong 500 °C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021 submission updates on-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11 and near 3000 transistors/chip for Gen. 12 are made possible by reductions in minimum layout feature sizes (including resistor width shrinkage from 6 µm to 2 µm) coupled with enlarged die size (from 3 x 3 mm to 5 x 5 mm). Gen. 11 ICs electrically tested to date include an 8-bit delta-sigma analog to digital converter (ADC) as well as upscaled random access memory (RAM) and nearly 1 kbit read only memory (ROM). However, Gen. 11 prototype ICs exhibited significantly lower yield and durability than Gen. 10 ICs. Development of revised processing is being investigated towards mitigating these issues in subsequent Gen. 12 fabrication run currently in progress.

silicon carbide↗

Q4 – A CubeSat Mission to Demonstrate Omnidirectional Optical Communications

We are proposing a technology demonstration mission for JPL’s Inter-Satellite Optical Communicator (ISOC). The ISOC has the potential to enable up to 1 Gbps data rates over a distance up to 200 km in free space. Key features of the ISOC include full sky coverage and the ability to maintain multiple links simultaneously. The Q4 mission consists of (4) 6U CubeSats furnished with ISOCs to demonstrate high data rate communications among the spacecraft. More specifically, we seek to demonstrate the omnidirectionality of the ISOC by providing simultaneous optical links between one spacecraft and the other three. Q4 will be a demonstrator for small spacecraft swarm capabilities. Following a proposed deployment from the ISS, the CubeSats will utilize their onboard thrusters to enter their desired orbit. The orbit consists of one “leader” spacecraft in a circular orbit with a 400 km LEO altitude and three “follower” spacecraft in slightly elliptical orbits rotating azimuthally about the leader. The main mission will consist of three consecutive phases: First, the spacecraft will demonstrate pointing, acquisition, and tracking using newly developed protocols. Next, link establishment and different channel access methods (CDMA and TDMA) will be tested. Finally, Delay Tolerant Network protocols will be implemented to allow fast data sharing among the spacecraft. The distance between the communicating spacecraft will be increased as the mission progresses to characterize the link quality as a function of distance. All communications over the course of the mission will be recorded and analyzed on the ground using bit error rate as a metric for success. The current design for each the four Q4 CubeSats contains an XACT advanced ADCS system for precision beam pointing. Other components currently under consideration include MiPS cold gas thrusters for orbital maneuvering and gimbaled eHaWK 84W solar arrays. In this paper we present design considerations for the Q4 CubeSats, link budget calculations, results from preliminary mission analysis, and expected results.

Velazco, Jose E↗

The Experiment for Cryogenic Large-Aperture Intensity Mapping (EXCLAIM)

The EXperiment for Cryogenic Large-Aperture Intensity Mapping (EXCLAIM) is a high-altitude balloon telescope designed to deepen our understanding of star formation in a cosmological context, shedding light on why the star formation rate declines and breaks away from the cosmological evolution of dark matter for redshifts z>2 [1]. EXCLAIM will operate at 420–540 GHz with a spectral resolution of R=512 to measure the integrated line emission from galaxies and the intergalactic medium (IGM), in particular CO and [CII] line emissions from the nearby universe out to redshifts of z~3.5. This approach is known as Intensity Mapping (IM), which provides efficient access to large cosmological volumes and redshifts with sensitivity limited by detector noise or photon background, while requiring modest apertures. The instrument will employ an array of six superconducting integrated grating-analog spectrometers (µ-Spec) with superconducting microwave kinetic inductance detectors (KIDs) in an all-cryogenic telescope (1.7 K) to achieve near background-limited sensitivity. Here, we present an overview of the EXCLAIM instrument and status, with emphasis on the Attitude Determination & Control System (ADCS) and the thermal system.

Giuseppe Cataldo↗