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At least 181 records · Page 10

Testing of Diode-Clamping in an Inductive Pulsed Plasma Thruster Circuit

Testing of a 5.5 kV silicon (Si) diode and 5.8 kV prototype silicon carbide (SiC) diode in an inductive pulsed plasma thruster (IPPT) circuit was performed to obtain a comparison of the resulting circuit recapture efficiency,eta(sub r), defined as the percentage of the initial charge energy remaining on the capacitor bank after the diode interrupts the current. The diode was placed in a pulsed circuit in series with a silicon controlled rectifier (SCR) switch, and the voltages across different components and current waveforms were collected over a range of capacitor charge voltages. Reverse recovery parameters, including turn-off time and peak reverse recovery current, were measured and capacitor voltage waveforms were used to determine the recapture efficiency for each case. The Si fast recovery diode in the circuit was shown to yield a recapture efficiency of up to 20% for the conditions tested, while the SiC diode further increased recapture efficiency to nearly 30%. The data presented show that fast recovery diodes operate on a timescale that permits them to clamp the discharge quickly after the first half cycle, supporting the idea that diode-clamping in IPPT circuit reduces energy dissipation that occurs after the first half cycle

Toftul, Alexandra↗

Strong-Drive Limits in Josephson Circuits: From Chaos to an Unbound-Resonance Threshold

Strong microwave drives enable fast measurement and parametric control in superconducting circuits but can induce transitions out of the intended low-energy manifold. We develop a unified description of strong-drive limits in flux- and charge-driven Josephson circuits across drive frequency and dc flux bias. Using classical phase-space analysis and Floquet--Markov simulations, we identify distinct low- and high-frequency mechanisms. At low frequency, we characterize bound-state resonances and separatrix chaos and find that the flux-drive chaos threshold depends strongly on dc flux bias. At high frequency, these mechanisms are suppressed, and the dissipative steady state transfers from the central bound-state sector to outer resonances formed by above-barrier running trajectories. The resulting unbound-resonance threshold is nearly independent of drive frequency and circuit parameters over the regime studied and is controlled primarily by dc flux bias. Coherent simulations show that parametric operation persists beyond this threshold, but at a reduced rate, setting an effective upper bound on the achievable operation speed. We derive analytical criteria for both thresholds, validate them numerically, and experimentally confirm the predicted dc-bias dependence of the low-frequency threshold in a flux-driven SQUID. We also determine the timescales for transfer into the unbound-resonance regime and relaxation back to the bound-state manifold after the drive is removed. Finally, we relate the stability limits to a complementary picture based on the junction critical current and extend the framework to multitone drives and inductively shunted circuits. Together, these results identify the mechanisms limiting strong driving and suggest routes to extend the stable operating range of Josephson circuits.

You, Xinyuan [Fermilab] (ORCID:0000000291789419)↗

An efficient quantum circuit for block encoding a pairing Hamiltonian

We present an efficient quantum circuit for block encoding a pairing Hamiltonian often studied in nuclear physics. Our block encoding scheme does not require mapping the creation and annihilation operators to the Pauli operators and representing the Hamiltonian as a linear combination of unitaries. Instead, we show how to encode the Hamiltonian directly using controlled swap operations. We analyze the gate complexity of the block encoding circuit and show that it scales polynomially with respect to the number of qubits required to represent a quantum state associated with the pairing Hamiltonian. We also show how the block encoding circuit can be combined with the quantum singular value transformation to construct an efficient quantum circuit for approximating the density of states of a pairing Hamiltonian. The techniques presented can be extended to encode more general second-quantized Hamiltonians.

97 MATHEMATICS AND COMPUTING↗

A Lie algebraic theory of barren plateaus for deep parameterized quantum circuits

Variational quantum computing schemes train a loss function by sending an initial state through a parametrized quantum circuit, and measuring the expectation value of some operator. Despite their promise, the trainability of these algorithms is hindered by barren plateaus (BPs) induced by the expressiveness of the circuit, the entanglement of the input data, the locality of the observable, or the presence of noise. Up to this point, these sources of BPs have been regarded as independent. In this work, we present a general Lie algebraic theory that provides an exact expression for the variance of the loss function of sufficiently deep parametrized quantum circuits, even in the presence of certain noise models. Our results allow us to understand under one framework all aforementioned sources of BPs. This theoretical leap resolves a standing conjecture about a connection between loss concentration and the dimension of the Lie algebra of the circuit’s generators.

97 MATHEMATICS AND COMPUTING↗

Noise-aware circuit compilations for a continuously parameterized two-qubit gateset

State-of-the-art noisy-intermediate-scale quantum processors are currently implemented across a variety of hardware platforms, each with their own distinct gatesets. As such, circuit compilation should not only be aware of but also deeply connect to the native gateset and noise properties of each. Trapped-ion processors are one such platform that provides a gateset that can be continuously parameterized across both one- and two-qubit gates. Here we use the Quantum Scientific Computing Open User Testbed to study noise-aware compilations focused on continuously parameterized two-qubit 𝑍⁢𝑍 gates (based on the Mølmer-Sørensen interaction) using $\scriptsize{SUPERSTAQ}$, a quantum software platform for hardware-aware circuit compiler optimizations. We discuss the realization of 𝑍⁢𝑍 gates with arbitrary angle on the all-to-all connected trapped-ion system. Then we discuss a variety of different compiler optimizations that innately target these 𝑍⁢𝑍 gates and their noise properties. These optimizations include moving from a restricted maximally entangling gateset to a continuously parameterized one, swap mirroring to further reduce the total entangling angle of the operations, focusing the heaviest 𝑍⁢𝑍 angle participation on the best-performing gate pairs, and circuit approximation to remove the least impactful 𝑍⁢𝑍 gates. We demonstrate these compilation approaches on the hardware with randomized quantum volume circuits, observing the potential to realize a larger quantum volume as a result of these optimizations. Using differing yet complementary analysis techniques, we observe the distinct improvements in system performance provided by these noise-aware compilations and study the role of stochastic and coherent error channels for each compilation choice.

Noise↗

Exact spectral gaps of random one-dimensional quantum circuits

The spectral gap of local random quantum circuits is a fundamental property that determines how close the moments of the circuit's unitaries match those of a Haar random distribution. When studying spectral gaps, it is common to bound these quantities using tools from statistical mechanics or via quantum information-based inequalities. Here, by focusing on the second moment of one-dimensional unitary circuits where nearest-neighboring gates act on sets of qudits (with open and closed boundary conditions), we show that one can exactly compute the associated spectral gaps. Indeed, having access to their functional form allows us to prove several important results, such as the fact that the spectral gap for closed boundary condition is exactly the square of the gap for open boundaries, as well as improve on previously known bounds for approximate design convergence. Finally, we verify our theoretical results by numerically computing the spectral gap for systems of up to 70 qubits, as well as comparing them to gaps of random orthogonal and symplectic circuits.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Gate-Based Quantum Simulation of Gaussian Bosonic Circuits on Exponentially Many Modes

We introduce a framework for simulating, on an ( n + 1 )-qubit quantum computer, the action of a Gaussian bosonic (GB) circuit on a state over 2 n modes. Specifically, we encode the initial bosonic state’s expectation values over quadrature operators (and their covariance matrix) as an input qubit state. This is then evolved by a quantum circuit that effectively implements the symplectic propagators induced by the GB gates. We find families of GB circuits and initial states leading to efficient quantum simulations. For this purpose, we introduce a dictionary that maps between GB and qubit gates such that particle- (non-particle-) preserving GB gates lead to real- (imaginary-) time evolutions at the qubit level. For the special case of particle-preserving circuits, we present a bounded-error-quantum-polynomial time (BQP)-complete GB decision problem, indicating that GB evolutions of Gaussian states on exponentially many modes are as powerful as universal quantum computers. We also perform numerical simulations of an interferometer on ∼ 8 × 10 9 modes, illustrating the power of our framework. Published by the American Physical Society 2025

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Graph Neural Networks for Parameterized Quantum Circuits Expressibility Estimation (Rev.1)

Parameterized quantum circuits (PQCs) are fundamental to quantum machine learning (QML), quantum optimization, and variational quantum algorithms (VQAs). The expressibility of PQCs is a measure that determines their capability to harness the full potential of the quantum state space. It is thus a crucial guidepost to know when selecting a particular PQC ansatz. However, the existing technique for expressibility computation through statistical estimation requires a large number of samples, which poses significant challenges due to time and computational resource constraints. This paper introduces a novel approach for expressibility estimation of PQCs using Graph Neural Networks (GNNs). We demonstrate the predictive power of our GNN model with a dataset consisting of 25,000 samples from the noiseless IBM QASM Simulator and 12,000 samples from three distinct noisy quantum backends. The model accurately estimates expressibility, with root mean square errors (RMSE) of 0.05 and 0.06 for the noiseless and noisy backends, respectively. We compare our model’s predictions with reference circuits from Sim et al. and IBM Qiskit’s hardwareefficient ansatz sets to further evaluate our model’s performance. Our experimental evaluation in noiseless and noisy scenarios reveals a close alignment with ground truth expressibility values, highlighting the model’s efficacy. Moreover, our model exhibits promising extrapolation capabilities, predicting expressibility values with low RMSE for out-of-range qubit circuits trained solely on only up to 5-qubit circuit sets. This work thus provides a reliable means of efficiently evaluating the expressibility of diverse PQCs on noiseless simulators and hardware.

97 MATHEMATICS AND COMPUTING↗

Encoding of linear kinetic plasma problems in quantum circuits via data compression

We propose an algorithm for encoding linear kinetic plasma problems in quantum circuits. The focus is on modelling electrostatic linear waves in a one-dimensional Maxwellian electron plasma. The waves are described by the linearized Vlasov–Ampère system with a spatially localized external current that drives plasma oscillations. This system is formulated as a boundary-value problem and cast in the form of a linear vector equation Aψ = b to be solved by using the quantum signal processing algorithm. The latter requires encoding of matrix A in a quantum circuit as a sub-block of a unitary matrix. We propose how to encode A in a circuit in a compressed form and discuss how the resulting circuit scales with the problem size and the desired precision.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Surpassing millisecond coherence in on chip superconducting quantum memories by optimizing materials and circuit design

The performance of superconducting quantum circuits for quantum computing has advanced tremendously in recent decades; however, a comprehensive understanding of relaxation mechanisms does not yet exist. In this work, we utilize a multimode approach to characterizing energy losses in superconducting quantum circuits, with the goals of predicting device performance and improving coherence through materials, process, and circuit design optimization. Using this approach, we measure significant reductions in surface and bulk dielectric losses by employing a tantalum-based materials platform and annealed sapphire substrates. With this knowledge we predict the relaxation times of aluminum- and tantalum-based transmon qubits, and find that they are consistent with experimental results. We additionally optimize device geometry to maximize coherence within a coaxial tunnel architecture, and realize on-chip quantum memories with single-photon Ramsey times of 2.0 – 2.7 ms, limited by their energy relaxation times of 1.0 – 1.4 ms. These results demonstrate an advancement towards a more modular and compact coaxial circuit architecture for bosonic qubits with reproducibly high coherence.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Measuring error rates of mid-circuit measurements

High-fidelity mid-circuit measurements, which read out the state of specific qubits in a multiqubit processor without destroying them or disrupting their neighbors, are a critical component for useful quantum computing. They enable fault-tolerant quantum error correction, dynamic circuits, and other paths to solving classically intractable problems. But there are few methods to assess their performance comprehensively. In this work, we address this gap by introducing the first randomized benchmarking protocol that measures the rate at which mid-circuit measurements induce errors in many-qubit circuits. Using this protocol, we detect and eliminate previously undetected measurement-induced crosstalk in a 20-qubit trapped-ion quantum computer. Then, we use the same protocol to measure the rate of measurement-induced crosstalk error on a 27-qubit IBM Q processor, and quantify how much of that error is eliminated by dynamical decoupling.

Hothem, Daniel [Sandia National Laboratories (SNL-↗

Magnetic flux imaging in a 3D superconductor integrated circuit

We report on imaging magnetic flux distributions in a multilayered superconductor integrated circuit which emerge during magnetization and after field cooling of the circuit in the DC magnetic field. The obtained complicated field maps expose the flux propagation across the patterned superconducting ground planes sandwiching layers with Josephson junction-based logic cells, fine wire grid around the functional units, and multiple superconducting fill structures located in different inner layers. The observed intricate flux distributions are explained by specific patterns of Meissner screening currents and superconducting critical currents in different mutually interacting parts of the integrated circuit. Our results provide important insights into possible ways of improving the protection of superconductor integrated circuits from magnetic fields and their resilience against flux trapping.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

A circuit-generated quantum subspace algorithm for the variational quantum eigensolver

Recent research has shown that wavefunction evolution in real and imaginary time can generate quantum subspaces with significant utility for obtaining accurate ground state energies. Inspired by these methods, we propose combining quantum subspace techniques with the variational quantum eigensolver (VQE). In our approach, the parameterized quantum circuit is divided into a series of smaller subcircuits. The sequential application of these subcircuits to an initial state generates a set of wavefunctions that we use as a quantum subspace to obtain high-accuracy groundstate energies. We call this technique the circuit subspace variational quantum eigensolver (CSVQE) algorithm. By benchmarking CSVQE on a range of quantum chemistry problems, we show that it can achieve significant error reduction in the best case compared to conventional VQE, particularly for poorly optimized circuits, greatly improving convergence rates. Furthermore, we demonstrate that when applied to circuits trapped at local minima, CSVQE can produce energies close to the global minimum of the energy landscape, making it a potentially powerful tool for diagnosing local minima.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Learning linear optical circuits with coherent states

We analyze the energy and training data requirements for supervised learning of an M-mode linear optical circuit by minimizing an empirical risk defined solely from the action of the circuit on coherent states. When the linear optical circuit acts non-trivially only on k < M unknown modes (i.e. a linear optical k-junta), we provide an energy-efficient, adaptive algorithm that identifies the junta set and learns the circuit. We compare two schemes for allocating a total energy, E, to the learning algorithm. In the first scheme, each of the T random training coherent states has energy E/T. In the second scheme, a single random MT-mode coherent state with energy E is partitioned into T training coherent states. The latter scheme exhibits a polynomial advantage in training data size sufficient for convergence of the empirical risk to the full risk due to concentration of measure on the $(2MT-1)$-sphere. Specifically, generalization bounds for both schemes are proven, which indicate that for ε-approximation of the full risk by the empirical risk with high probability, $O(E^{2/3}M^{2/3}/\epsilon^{2/3})$ training states are sufficient for the first scheme and $O(E^{1/3}M^{1/3}/\epsilon^{2/3})$ training states are sufficient for the second scheme.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Logical error rates for the surface code under a mixed coherent and stochastic circuit-level noise model inspired by trapped ions

With fault-tolerant quantum computing (FTQC) on the horizon, it is critical to understand sources of logical errors in plausible hardware implementations of quantum error-correcting codes. Detailed error modeling of computational instructions on particular FTQC architectures will enable the better prediction of error propagation in FT-encoded quantum circuits while revealing where greater attention is needed in hardware design. In this work, we consider logical error rates for the surface code implemented on a hypothetical grid-based trapped-ion quantum charge-coupled device architecture. Specifically, we construct logical channels for the idling surface code and examine its diamond error under a mixed coherent and stochastic circuit-level noise model inspired by trapped ions. We include the coherent dephasing noise that is known to accumulate during physical qubit idling and transport in these systems, determining idling and transport durations using the time-resolved output of an open-source trapped-ion surface code compiler. To estimate expectation values of logical Pauli observables following hardware circuits containing non-Clifford sources of noise, we utilize a Monte Carlo technique to sample from an underlying quasiprobability distribution of Clifford circuits that we independently simulate in a phase-sensitive fashion. We verify error suppression up to code distance 𝑑 = 11 at coherent dephasing rates near and below those of current-generation trapped-ion quantum computers and find that logical error rates align with those of analogous fully stochastic simulations in this regime. Exploring higher dephasing rates at 𝑑 = 3−5, we find evidence for growing coherent rotations about all three logical Pauli axes, increased diagonal logical error process matrix elements relative to those of stochastic simulations, and a reduced dephasing rate threshold. Overall, our work paves a way toward realistic hardware emulation of small fault-tolerant quantum processes, e.g., members of an FTQC instruction set.

Quantum benchmarking↗

Acceptor-Induced Bulk Dielectric Loss in Superconducting Circuits on Silicon

The performance of superconducting quantum circuits is primarily limited by dielectric loss due to interactions with two-level systems (TLSs). State-of-the-art circuits with engineered material interfaces are approaching a limit where dielectric loss from bulk substrates plays an important role. However, a microscopic understanding of dielectric loss in crystalline substrates is still lacking. In this work, we show that boron acceptors in silicon constitute a TLS bath that leads to an energy dissipation channel for superconducting circuits. We discuss how the electronic structure of boron acceptors leads to an effective TLS response in silicon. We sweep the boron concentration in silicon and demonstrate the bulk dielectric loss limit from boron acceptors. We show that boron-induced dielectric loss can be reduced in a magnetic field due to the spin-orbit structure of boron. This work provides the first detailed microscopic description of a TLS bath for superconducting circuits and demonstrates the need for ultrahigh-purity substrates for next-generation superconducting quantum processors.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Grid Forming Inverter With Increased Short-Circuit Contribution to Address Inverter-Based Microgrid Protection Challenges

Substantial differences in fault levels between grid-tied and islanded modes is one of the primary challenges of microgrid protection. During grid-tied mode, the bulk grid provides significant short-circuit, while during islanded operation the short-circuit magnitude is small due to inverter-based resources limiting their current output close to nominal ratings. Consequently, conventional distribution protection strategies based on overcurrent cannot reliably protect microgrids when operating in islanded mode. Fuses and circuit breakers are particularly affected because of their inverse characteristics. Presently, the absence of affordable solutions for protecting microgrids in islanded mode leads to microgrids shutting down during electrical faults. The contribution of this article is two-fold. The first innovation proposes specific hardware modifications to grid-forming inverters to increase their short-circuit current during electrical faults. The second innovation introduces a novel control strategy designed to preserve control stability margins even when the grid-filter saturates, ensuring sinusoidal output currents under normal and fault conditions. Through experimental results, the inverter with the proposed modifications can provide more than three-times its nominal current during electrical faults. For the prototype testbed, this was sufficient to enable the use of traditional legacy overcurrent protection, achieving the fuse-to-relay and relay-to-relay minimum coordination time for the line-to-ground, line-to-line to ground, and three-phase electrical faults.

42 ENGINEERING↗

Impact of K-factor on Short Circuit Program Convergence for Inverter-Based Resources during Faults

Classical short-circuit programs that linearize the power network are no longer applicable for inverter based resources (IBRs), necessitating an iterative approach. Phasor domain programs can model the IBRs using an iterative approach considering nonlinear fault responses. In phasor domain models, the IBR can be modeled as a voltage controlled current source (VCCS) in tabular form with positive, negative, and zero sequence information for balanced and unbalance short-circuit faults. In the VCCS modeling of the IBR, positive and negative incremental reactive current, also known as the k-factor, plays an important role in short circuit program convergence. In this work, a few approaches: conventional VCCS modeling with a k-factor of 2, conventional VCCS modeling with a k-factor of 2 with modified pre-fault voltages, VCCS characteristics based on the power flow solution with a k-factor of 2, and VCCS characteristics based on the power flow solution with a k-factor of 1 are investigated for short circuit program convergence under higher IBR penetration. The IEEE 39 bus New England Test System is taken as the test system, and simulations are carried out in PSS®CAPE 15.0.26 simulation software. Simulation results demonstrate that IBR penetration is higher for the VCCS model, which corresponds to the power flow solution with k-factor 1, compared to other approaches.

42 ENGINEERING↗