Spring 2021 Update on the Los Alamos Benchmark Suite [Slides]
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This dataset contains the Recorder trace files of 91 built-in tests from three widely-used I/O libraries. It was utilized in our IPDPS'25 paper, "VerifyIO: Verifying Adherence to Parallel I/O Consistency Semantics". The dataset can be used to reproduce the results presented in the paper and to conduct additional analyses
This report describes a study performed by the Colorado Center for Astrodynamics Research (CCAR) on GPS measurement errors in the Codeless GPS Attitude Determination System (CGADS) due to noise and multipath interference. Preliminary simulation models fo the CGADS receiver and orbital multipath are described. The standard FFT algorithms for processing the codeless data is described and two alternative algorithms - an auto-regressive/least squares (AR-LS) method, and a combined adaptive notch filter/least squares (ANF-ALS) method, are also presented. Effects of system noise, quantization, baseband frequency selection, and Doppler rates on the accuracy of phase estimates with each of the processing methods are shown. Typical electrical phase errors for the AR-LS method are 0.2 degrees, compared to 0.3 and 0.5 degrees for the FFT and ANF-ALS algorithms, respectively. Doppler rate was found to have the largest effect on the performance.
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The SLAC RCE platform is a general purpose clustered data acquisition system implemented on a custom ATCA compliant blade, called the Cluster On Board (COB). The core of the system is the Reconfigurable Cluster Element (RCE), which is a system-on-chip design based upon the Xilinx Zynq family of FPGAs, mounted on custom COB daughter-boards. The Zynq architecture couples a dual core ARM Cortex A9 based processor with a high performance 28nm FPGA. The RCE has 12 external general purpose bi-directional high speed links, each supporting serial rates of up to 12Gbps. 8 RCE nodes are included on a COB, each with a 10Gbps connection to an on-board 24-port Ethernet switch integrated circuit. The COB is designed to be used with a standard full-mesh ATCA backplane allowing multiple RCE nodes to be tightly interconnected with minimal interconnect latency. Multiple shelves can be clustered using the front panel 10-gbps connections. The COB also supports local and inter-blade timing and trigger distribution. An experiment specific Rear Transition Module adapts the 96 high speed serial links to specific experiments and allows an experiment-specific timing and busy feedback connection. This coupling of processors with a high performance FPGA fabric in a low latency, multiple node cluster allows high speed data processing that can be easily adapted to any physics experiment. RTEMS and Linux are both ported to the module. The RCE has been used or is the baseline for several current and proposed experiments (LCLS, HPS, LSST, ATLAS-CSC, LBNE, DarkSide, ILC-SiD, etc).
The TESLA 9-cell SRF cavity design has been adopted for use in the LCLS-II SRF Linac. Its TTF3 coaxial fundamental power coupler (FPC), optimized for pulsed operation in European XFEL and ILC, requires modest changes to make it suitable for LCLS-II continuous-wave (CW) operation. For LCLS-II it must handle up to 7 kW of power, fully reflected, with the maximum temperature around 450 K, the coupler bake temperature. In order to improve TTF3 FPC cooling, an increased copper plating thickness will be used on the inner conductor of the ‘warm’ section of the coupler. Also, the antenna will be shortened to achieve higher cavity Qext values. Fully 3D FPC thermal analysis has been performed using the SLAC-developed parallel finite element code suite ACE3P, which includes electromagnetic codes and an integrated electromagnetic, thermal and mechanical multi-physics code. In this paper, we present TTF3 FPC thermal analysis simulation results obtained using ACE3P as well as a comparison with measurement results.
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