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Outputs of differential amplifier are excellently matched in phase and amplitude over wide range of frequencies. Common mode feedback loop offsets differences between two signal paths. Possible applications of circuit are in oscilloscopes, integrated circuit logic tester, and other self contained instruments.
Shuttle voice processing uses a Variable Slope Delta Modulation scheme which is a variant of the ABATE algorithm. This paper summarizes the ground terminal subsystem which processes the multiplexed voice and telemetry data digital sequence in the downlink processing and digitizes the voice signal in the uplink processing. The Delta Modulation System (DMS) performance characteristics are given in terms of an intelligibility test score and in terms of time and frequency responses measured on a production system developed for NASA Goddard Space Flight Center. Implementation details of the encoder and decoder algorithms are given in terms of the circuit logic used to implement them.
The development of Boolean calculus for its application to developing digital system design methodologies that would reduce system complexity, size, cost, speed, power requirements, etc., is discussed. Synthesis procedures for logic circuits are examined particularly asynchronous circuits using clock triggered flip flops.
A digital demodulator for converting pulse code modulated data from phase shift key (PSK) to non return to zero (NRZ) and to biphase data is described. The demodulator is composed of standard integrated logic circuits. The key to the demodulation function is a pair of cross coupled one shot multivibrators and which with a flip-flop produce the NRZ-L is all that is required, the circuitry is greatly simplified and the 2(v) times bit rate contraint can be removed from the carrier. A flip-flop, an OR gate, and AND gate and a binary counter generate the bit rate clock (BTCK) for the NRZ-L. The remainder of the circuitry is for converting the NRZ-L and BTCK into biphase data. The device was designed for use in the space shuttle bay environment measurements.
Proposals are now being developed for the construction of high-power photovoltaic systems for operation in low Earth orbit, where the plasma number density is about 1,000 to 1,000,000 per cubic cm. Existing data indicate that interactions between the plasma and high-voltage surfaces of an orbiting power system will occur. In ground tests, where the applied voltage is increased negatively from ground, the array current collection shows an approximately linear rise until it terminates in arcing at greater than several hundred volts negative. This arcing may reduce the power generation efficiency and could possibly affect the low-level logic circuits of the spacecraft. Therefore it is important that the arcing phenomenon be well understood. This study is a survey of the behavior of different dielectric-conductor samples, including a solar cell module, that were biased negatively in a low-density plasma environment with the intent of defining arc discharge conditions and characteristics. Procedures and results are discussed.
The concept of Boolean integration is introduced and developed. When the changes in a desired function are specified in terms of changes in its arguments, then ways of 'integrating' (i.e., realizing) the function, if it exists, are presented. Boolean integral calculus has applications in design of logic circuits.
Since the first introduction of charge-coupled devices (CCDs) in 1970, CCDs have been considered for applications related to memories, logic circuits, and the detection of visible radiation. It is pointed out, however, that the mass market orientation of CCD development has left largely untapped the enormous potential of these devices for advanced scientific instrumentation. The present paper has, therefore, the objective to introduce the CCD characteristics to the scientific community, taking into account prospects for further improvement. Attention is given to evaluation criteria, a summary of current CCDs, CCD performance characteristics, absolute calibration tools, quantum efficiency, aspects of charge collection, charge transfer efficiency, read noise, and predictions regarding the characteristics of the next generation of silicon scientific CCD imagers.
Equivalent base resistance added. Theoretical study develops equations for parameters of Gummel-Poon model of bipolar junction transistor: includes saturation current, amplification factors, charging times, knee currents, capacitances, and resistances. Portion of study concerned with base region goes beyond Gummel-Poon analysis to provide more complete understanding of transistor behavior. Extended theory useful in simulation of single-event upset (SEU) caused in logic circuits by cosmic rays or other ionizing radiation.
Theoretical paper discusses response of enhancement-mode metal oxide/semiconductor field-effect transistor to cosmic-ray ion that passes perpendicularly through gate-oxide layers. Even if ion causes no permanent damage, temporary increase of electrical conductivity along track of ion large enough and long enough to cause change in logic state in logic circuit containing MOSFET.
The concept of Boolean integration is developed, and different Boolean integral operators are introduced. Given the changes in a desired function in terms of the changes in its arguments, the ways of 'integrating' (i.e. realizing) such a function, if it exists, are presented. The necessary and sufficient conditions for integrating, in different senses, the expression specifying the changes are obtained. Boolean calculus has applications in the design of logic circuits and in fault analysis.
Proposed random-access-memory (RAM) addressing system, in which memory linked optically to read/write logic circuits, greatly increases computer operating speed. System - comprises addressing circuits including numerous lasers as signal sources, numerous optical gates including optical detectors associated with memory cells, and holographic element to direct light signals to desired memory-cell locations - applied to high-capacity digital systems, supercomputers, and complex microcircuits.
Computed rates of SEU's more accurate. Exact integral chord-length distribution derived for use in calculations of rates of single-event upsets (SEU's) (changes in logic states) caused by impingement of cosmic rays or other ionizing radiation on electronic logic circuits.
Improved method of encoding digital data provides for efficient lossless compression of partially or even mostly redundant data from low-information-content source. Method of coding implemented in relatively simple, high-speed arithmetic and logic circuits. Also increases coding efficiency beyond that of established Huffman coding method in that average number of bits per code symbol can be less than 1, which is the lower bound for Huffman code.
A 32-bit serial integer multiplier was designed to investigate the yield and performance of complementary heterojunction FET (CHFET) technology. This is the largest reported CHFET logic circuit. The maximum operating frequency was 500 MHz. Very low power dissipation of 3 mW was obtained at 5 MHz operation. Single-event upset (SEU) characteristics of CHFET devices and latches were also measured and indicates the potential for SEU hard circuits for space and military applications.
This paper describes the development of a digital correlator chip with the following features: 1 Giga-sample/second; 256 channels; 1-bit quantization; 32-bit counters providing up to 4 seconds integration time at 1 GHz; and very low power dissipation per channel. The improvements in the performance-to-cost ratio of the digital correlator chip are achieved with a combination of systolic architecture, novel pipelined differential logic circuits, and standard 1.0 micron CMOS process.
The objective of this research program was to develop an innovative advanced satellite receiver/demodulator utilizing surface acoustic wave (SAW) chirp transform processor and coherent BPSK demodulation. The algorithm of this SAW chirp Fourier transformer is of the Convolve - Multiply - Convolve (CMC) type, utilizing off-the-shelf reflective array compressor (RAC) chirp filters. This satellite receiver, if fully developed, was intended to be used as an on-board multichannel communications repeater. The Advanced Communications Receiver consists of four units: (1) CMC processor, (2) single sideband modulator, (3) demodulator, and (4) chirp waveform generator and individual channel processors. The input signal is composed of multiple user transmission frequencies operating independently from remotely located ground terminals. This signal is Fourier transformed by the CMC Processor into a unique time slot for each user frequency. The CMC processor is driven by a waveform generator through a single sideband (SSB) modulator. The output of the coherent demodulator is composed of positive and negative pulses, which are the envelopes of the chirp transform processor output. These pulses correspond to the data symbols. Following the demodulator, a logic circuit reconstructs the pulses into data, which are subsequently differentially decoded to form the transmitted data. The coherent demodulation and detection of BPSK signals derived from a CMC chirp transform processor were experimentally demonstrated and bit error rate (BER) testing was performed. To assess the feasibility of such advanced receiver, the results were compared with the theoretical analysis and plotted for an average BER as a function of signal-to-noise ratio. Another goal of this SBIR program was the development of a commercial product. The commercial product developed was an arbitrary waveform generator. The successful sales have begun with the delivery of the first arbitrary waveform generator.
Electrophysiological changes in the sensorimotor pathways were found to accompany the effect of rhythmic EEG patterns in the sensorimotor cortex. Additionally, several striking behavioral changes were seen, including in particular an enhancement of sleep and an elevation of seizure threshold to epileptogenic agents. This raised the possibility that human seizure disorders might be influenced therapeutically by similar training. Our objective in human EEG feedback training became not only the facilitation of normal rhythmic patterns, but also the suppression of abnormal activity, thus requiring complex contingencies directed to the normalization of the sensorimotor EEG. To achieve this, a multicomponent frequency analysis was developed to extract and separate normal and abnormal elements of the EEG signal. Each of these elements was transduced to a specific component of a visual display system, and these were combined through logic circuits to present the subject with a symbolic display. Variable criteria provided for the gradual shaping of EEG elements towards the desired normal pattern. Some 50-70% of patients with poorly controlled seizure disorders experienced therapeutic benefits from this approach in our laboratory, and subsequently in many others. A more recent application of this approach to the modification of human brain function in our lab has been directed to the dichotomous problems of task overload and underload in the contemporary aviation environment. At least 70% of all aviation accidents have been attributed to the impact of these kinds of problems on crew performance. The use of EEG in this context has required many technical innovations and the application of the latest advances in EEG signal analysis. Our first goal has been the identification of relevant EEG characteristics. Additionally, we have developed a portable recording and analysis system for application in this context. Findings from laboratory and in-flight studies suggest that we will be able to detect appropriate changes in brain function, and feed this information to on-board computers for modification of mission requirements and/or crew status.
Data-logger interface and test controller developed to enable automation of tests in conjunction with data-acquisition functions performed by data loggers that have output-switching capabilities. Includes relay logic circuits that remain deenergized until out-of-tolerance condition on any data channel discovered. Designed to be connected to Fluke model 2286A (or equivalent) data-logger system, which features 3 control channels with 6 data inputs per channel. Includes elapsed-time counter that keeps track of power outages.