Search NASA⌕ Search

SEARCH · Search NASA

Results for “Memory device”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 181 records · Page 10
All sourcesNASA NTRSDOE OSTI
NASA NTRS2008

Disturb testing in flash memories

Non-volatile memory technology as defined by NAND architecture flash memory continues to lead the process scaling and device shrinking efforts of the entire integrated circuit industry. 45- nm technology nodes are now producing commercial 32Gb devices. These latest 32Gb devices are pioneering new charge trapping memory cell technologies using metal gates and high-k dielectric materials. These cells are called TANOS and consist of tantalum-nitride, aluminum oxide (high k material), nitride, oxide, and silicon. Such high-density memories continue to revolutionize commercial electronics in terms of new high-speed data architectures and significant reductions in overall power and weight consumption. In stark contrast, nearly all science-based interplanetary and earth-orbiting NASA spacecraft are still designing in and around mid-1980s-level non-volatile technology with 1Mb Electrically Erasable Read-Only Memory (EEPROM) devices. NASA has typically shunned the use of modern flash devices because of radiation and reliability concerns due to the commercial-offthe– shelf (COTS) nature of the NAND flash technology. Given the significant potential increases in overall system capability these modern flash devices could bring to NASA missions, it is important to continue to investigate these devices. This report will investigate certain portions of the reliability performance of NAND flash devices, specifically the disturb properties. Understanding the possible limitations such new non-volatile memory technology presents to NASA is the goal of this report.

Freie, Michael↗
NASA NTRS1994

Performance issues for iterative solvers in device simulation

Due to memory limitations, iterative methods have become the method of choice for large scale semiconductor device simulation. However, it is well known that these methods still suffer from reliability problems. The linear systems which appear in numerical simulation of semiconductor devices are notoriously ill-conditioned. In order to produce robust algorithms for practical problems, careful attention must be given to many implementation issues. This paper concentrates on strategies for developing robust preconditioners. In addition, effective data structures and convergence check issues are also discussed. These algorithms are compared with a standard direct sparse matrix solver on a variety of problems.

Fan, Qing↗
NASA NTRS2010

Electrical Switching of Perovskite Thin-Film Resistors

Electronic devices that exploit electrical switching of physical properties of thin films of perovskite materials (especially colossal magnetoresistive materials) have been invented. Unlike some related prior devices, these devices function at room temperature and do not depend on externally applied magnetic fields. Devices of this type can be designed to function as sensors (exhibiting varying electrical resistance in response to varying temperature, magnetic field, electric field, and/or mechanical pressure) and as elements of electronic memories. The underlying principle is that the application of one or more short electrical pulse(s) can induce a reversible, irreversible, or partly reversible change in the electrical, thermal, mechanical, and magnetic properties of a thin perovskite film. The energy in the pulse must be large enough to induce the desired change but not so large as to destroy the film. Depending on the requirements of a specific application, the pulse(s) can have any of a large variety of waveforms (e.g., square, triangular, or sine) and be of positive, negative, or alternating polarity. In some applications, it could be necessary to use multiple pulses to induce successive incremental physical changes. In one class of applications, electrical pulses of suitable shapes, sizes, and polarities are applied to vary the detection sensitivities of sensors. Another class of applications arises in electronic circuits in which certain resistance values are required to be variable: Incorporating the affected resistors into devices of the present type makes it possible to control their resistances electrically over wide ranges, and the lifetimes of electrically variable resistors exceed those of conventional mechanically variable resistors. Another and potentially the most important class of applications is that of resistance-based nonvolatile-memory devices, such as a resistance random access memory (RRAM) described in the immediately following article, Electrically Variable Resistive Memory Devices (MFS-32511-1).

Liu, Shangqing↗
NASA NTRS1996

Report on Alternative Devices to Pyrotechnics on Spacecraft

Pyrotechnics accomplish many functions on today's spacecraft, possessing minimum volume/weight, providing instantaneous operation on demand, and requiring little input energy. However, functional shock, safety, and overall system cost issues, combined with emergence and availability of new technologies question their continued use on space missions. Upon request from the National Aeronautics and Space Administration's (NASA) Program Management Council (PMC), Langley Research Center (LaRC) conducted a survey to identify and evaluate state-of-the-art non-explosively actuated (NEA) alternatives to pyrotechnics, identify NEA devices planned for NASA use, and investigate potential interagency cooperative efforts. In this study, over 135 organizations were contacted, including NASA field centers, Department of Defense (DOD) and other government laboratories, universities, and American and European industrial sources resulting in further detailed discussions with over half, and 18 face-to-face briefings. Unlike their single use pyrotechnic predecessors, NEA mechanisms are typically reusable or refurbishable, allowing flight of actual tested units. NEAs surveyed include spool-based devices, thermal knife, Fast Acting Shockless Separation Nut (FASSN), paraffin actuators, and shape memory alloy (SMA) devices (e.g., Frangibolt). The electro-mechanical spool, paraffin actuator and thermal knife are mature, flight proven technologies, while SMA devices have a limited flight history. There is a relationship between shock, input energy requirements, and mechanism functioning rate. Some devices (e.g., Frangibolt and spool based mechanisms) produce significant levels of functional shock. Paraffin, thermal knife, and SMA devices can provide gentle, shock-free release but cannot perform critically timed, simultaneous functions. The FASSN flywheel-nut release device possesses significant potential for reducing functional shock while activating nearly instantaneously. Specific study recommendations include: (1) development of NEA standards, specifically in areas of material characterization, functioning rates, and test methods; (2) a systems level approach to assure successful NEA technology application; and (3) further investigations into user needs, along with industry/government system-level real spacecraft cost benefit trade studies to determine NEA application foci and performance requirements. Additional survey observations reveal an industry and government desire to establish partnerships to investigate remaining unknowns and formulate NEA standards, specifically those driven by SMAs. Finally, there is increased interest and need to investigate alternative devices for such functions as stage/shroud separation and high pressure valving. This paper summarizes results of the NASA-LaRC survey of pyrotechnic alternatives. State of-the-art devices with their associated weight and cost savings are presented. Additionally, a comparison of functional shock characteristics of several devices are shown, and potentially related technology developments are highlighted.

Lucy, M. H.↗
NASA NTRS1979

Aerospace Ground Equipment for model 4080 sequence programmer. A standard computer terminal is adapted to provide convenient operator to device interface

The Aerospace Ground Equipment (AGE) provides an interface between a human operator and a complete spaceborne sequence timing device with a memory storage program. The AGE provides a means for composing, editing, syntax checking, and storing timing device programs. The AGE is implemented with a standard Hewlett-Packard 2649A terminal system and a minimum of special hardware. The terminal's dual tape interface is used to store timing device programs and to read in special AGE operating system software. To compose a new program for the timing device the keyboard is used to fill in a form displayed on the screen.

Nissley, L. E.↗
NASA NTRS2008

Fast Electromechanical Switches Based on Carbon Nanotubes

Electrostatically actuated nanoelectromechanical switches based on carbon nanotubes have been fabricated and tested in a continuing effort to develop high-speed switches for a variety of stationary and portable electronic equipment. As explained below, these devices offer advantages over electrostatically actuated microelectromechanical switches, which, heretofore, have represented the state of the art of rapid, highly miniaturized electromechanical switches. Potential applications for these devices include computer memories, cellular telephones, communication networks, scientific instrumentation, and general radiation-hard electronic equipment. A representative device of the present type includes a single-wall carbon nanotube suspended over a trench about 130 nm wide and 20 nm deep in an electrically insulating material. The ends of the carbon nanotube are connected to metal electrodes, denoted the source and drain electrodes. At bottom of the trench is another metal electrode, denoted the pull electrode (see figure). In the off or open switch state, no voltage is applied, and the nanotube remains out of contact with the pull electrode. When a sufficiently large electric potential (switching potential) is applied between the pull electrode and either or both of the source and drain electrodes, the resulting electrostatic attraction bends and stretches the nanotube into contact with the pull electrode, thereby putting the switch into the "on" or "closed" state, in which substantial current (typically as much as hundreds of nanoamperes) is conducted. Devices of this type for use in initial experiments were fabricated on a thermally oxidized Si wafer, onto which Nb was sputter-deposited for use as the pull-electrode layer. Nb was chosen because its refractory nature would enable it to withstand the chemical and thermal conditions to be subsequently imposed for growing carbon nanotubes. A 200- nm-thick layer of SiO2 was formed on top of the Nb layer by plasma-enhanced chemical vapor deposition. In the device regions, the SiO2 layer was patterned to thin it to the 20-nm trench depth. The trenches were then patterned by electron- beam lithography and formed by reactive- ion etching of the pattern through the 20-nm-thick SiO2 to the Nb layer.

Kaul, Anupama↗
NASA NTRS1978

The study of surface acoustic wave charge transfer device

A surface acoustic wave-charge transfer device, consisting of an n-type silicon substrate, a thermally grown silicon dioxide layer, and a sputtered film of piezoelectric zinc oxide is proposed as a means of circumventing problems associated with charge-coupled device (CCD) applications in memory, signal processing, and imaging. The proposed device creates traveling longitudinal electric fields in the silicon and replaces the multiphase clocks in CCD's. The traveling electric fields create potential wells which carry along charges stored there. These charges may be injected into the wells by light or by using a p-n junction as in conventional CCD's.

Papanicolaou, N.↗
NASA NTRS2008

Spaceborne Processor Array

A Spaceborne Processor Array in Multifunctional Structure (SPAMS) can lower the total mass of the electronic and structural overhead of spacecraft, resulting in reduced launch costs, while increasing the science return through dynamic onboard computing. SPAMS integrates the multifunctional structure (MFS) and the Gilgamesh Memory, Intelligence, and Network Device (MIND) multi-core in-memory computer architecture into a single-system super-architecture. This transforms every inch of a spacecraft into a sharable, interconnected, smart computing element to increase computing performance while simultaneously reducing mass. The MIND in-memory architecture provides a foundation for high-performance, low-power, and fault-tolerant computing. The MIND chip has an internal structure that includes memory, processing, and communication functionality. The Gilgamesh is a scalable system comprising multiple MIND chips interconnected to operate as a single, tightly coupled, parallel computer. The array of MIND components shares a global, virtual name space for program variables and tasks that are allocated at run time to the distributed physical memory and processing resources. Individual processor- memory nodes can be activated or powered down at run time to provide active power management and to configure around faults. A SPAMS system is comprised of a distributed Gilgamesh array built into MFS, interfaces into instrument and communication subsystems, a mass storage interface, and a radiation-hardened flight computer.

Chow, Edward T.↗
NASA NTRS1972

C-MOS array design techniques: SUMC multiprocessor system study

The current capabilities of LSI techniques for speed and reliability, plus the possibilities of assembling large configurations of LSI logic and storage elements, have demanded the study of multiprocessors and multiprocessing techniques, problems, and potentialities. Evaluated are three previous systems studies for a space ultrareliable modular computer multiprocessing system, and a new multiprocessing system is proposed that is flexibly configured with up to four central processors, four 1/0 processors, and 16 main memory units, plus auxiliary memory and peripheral devices. This multiprocessor system features a multilevel interrupt, qualified S/360 compatibility for ground-based generation of programs, virtual memory management of a storage hierarchy through 1/0 processors, and multiport access to multiple and shared memory units.

Clapp, W. A.↗
NASA NTRS1994

Improved Ferroelectric Memories With Nondestructive Readout

Ferroelectric memories with enhanced photoresponse leading to improved nondestructive optoelectronic readout and lower power demand proposed. Memories improved versions of devices described in "Rapid, Nondestructive Readout From Ferroelectric Memory" (NPO-18551). In proposed application, array of nonvolatile ferroelectric memory cells fabricated by standard very-large-scale integrated-circuit techniques and flip-bonded onto similarly fabricated array of semiconductor lasers, {see "Optically Addressable, Ferroelectric Memory With NDRO" (NPO-18573)}.

Thakoor, Sarita↗
NASA NTRS1990

Solid-state reprogrammable analog resistive devices for electronic neural networks

The fabrication and performance of WO3-based, solid-state, three-terminal device configurations as programmable analog memory elements are reported. These transistorlike device structures exhibit good resistance progammability with a remarkable resolution of a few percent of the resistive strength over a four orders of magnitude dynamic range. The most critical component of these devices is an insulating layer between the active WO3 and the cation donor layer. The progamming characteristics and operation mechanisms of the device are described, and probable reaction mechanisms critical to the device stability are discussed.

Ramesham, R.↗
NASA NTRS1991

An electronic pan/tilt/zoom camera system

A camera system for omnidirectional image viewing applications that provides pan, tilt, zoom, and rotational orientation within a hemispherical field of view (FOV) using no moving parts was developed. The imaging device is based on the effect that from a fisheye lens, which produces a circular image of an entire hemispherical FOV, can be mathematically corrected using high speed electronic circuitry. An incoming fisheye image from any image acquisition source is captured in memory of the device, a transformation is performed for the viewing region of interest and viewing direction, and a corrected image is output as a video image signal for viewing, recording, or analysis. As a result, this device can accomplish the functions of pan, tilt, rotation, and zoom throughout a hemispherical FOV without the need for any mechanical mechanisms. A programmable transformation processor provides flexible control over viewing situations. Multiple images, each with different image magnifications and pan tilt rotation parameters, can be obtained from a single camera. The image transformation device can provide corrected images at frame rates compatible with RS-170 standard video equipment.

Zimmermann, Steve↗
NASA NTRS1999

Omniview motionless camera orientation system

A device for omnidirectional image viewing providing pan-and-tilt orientation, rotation, and magnification within a hemispherical field-of-view that utilizes no moving parts. The imaging device is based on the effect that the image from a fisheye lens, which produces a circular image of at entire hemispherical field-of-view, which can be mathematically corrected using high speed electronic circuitry. More specifically, an incoming fisheye image from any image acquisition source is captured in memory of the device, a transformation is performed for the viewing region of interest and viewing direction, and a corrected image is output as a video image signal for viewing, recording, or analysis. As a result, this device can accomplish the functions of pan, tilt, rotation, and zoom throughout a hemispherical field-of-view without the need for any mechanical mechanisms. The preferred embodiment of the image transformation device can provide corrected images at real-time rates, compatible with standard video equipment. The device can be used for any application where a conventional pan-and-tilt or orientation mechanism might be considered including inspection, monitoring, surveillance, and target acquisition.

Zimmermann, Steven D.↗
NASA NTRS1990

Rapid recovery from transient faults in the fault-tolerant processor with fault-tolerant shared memory

The Draper fault-tolerant processor with fault-tolerant shared memory (FTP/FTSM), which is designed to allow application tasks to continue execution during the memory alignment process, is described. Processor performance is not affected by memory alignment. In addition, the FTP/FTSM incorporates a hardware scrubber device to perform the memory alignment quickly during unused memory access cycles. The FTP/FTSM architecture is described, followed by an estimate of the time required for channel reintegration.

Harper, Richard E.↗
NASA NTRS1999

EXPRESS Rack Technology for Space Station

The EXPRESS rack provides accommodations for standard Mid-deck Locker and ISIS drawer payloads on the International Space Station. A design overview of the basic EXPRESS rack and two derivatives, the Human Research Facility and the Habitat Holding Rack, is given in Part I. In Part II, the design of the Solid State Power Control Module (SSPCM) is reviewed. The SSPCM is a programmable and remotely controllable power switching and voltage conversion unit which distributes and protects up to 3kW of 12OVDC and 28VDC power to payloads and rack subsystem components. Part III details the development and testing of a new data storage device, the BRP EXPRESS Memory Unit (BEMU). The BEMU is a conduction-cooled device which operates on 28VDC and is based on Boeing-modified 9GB commercial disk-drive technology. In Part IV results of a preliminary design effort for a rack Passive Damping System (PDS) are reported. The PDS is intended to isolate ISPR-based experiment racks from on-orbit vibration. System performance predictions based on component developmental testing indicate that such a system can provide effective isolation at frequencies of 1 Hz and above.

Davis, Ted B.↗
NASA NTRS2020

NASA Goddard Space Flight Center’s Compendium of Radiation Effects Test Results

Total ionizing dose, displacement damage dose, and single event effects testing were performed to characterize and determine the suitability of candidate electronics for NASA space utilization. Devices tested include FETs, flash memory, FPGAs, optoelectronics, digital, analog, and bipolar devices.

Single Event Effects (SEE)↗
NASA NTRS2020

NASA Goddard Space Flight Center’s Compendium of Radiation Effects Test Results

Total ionizing dose, displacement damage dose, and single event effects testing were performed to characterize and determine the suitability of candidate electronics for NASA space utilization. Devices tested include FETs, flash memory, FPGAs, optoelectronics, digital, analog, and bipolar devices.

Single Event Effects (SEE)↗