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Digital computer program, JTRAC, simulates time response of electronic circuit to arbitrary forcing functions which may include electrical and/or radiation stimuli. Program is designed to solve linear and nonlinear simultaneous equations which characterize mathematical models used to predict circuit response for electrical and/or radiation input.
The figure shows the LEMUR II - the second generation of the Limbed Excursion Mechanical Utility Robot (LEMUR), which was described in "Six-Legged Experimental Robot" (NPO-20897), NASA Tech Briefs, Vol. 25, No. 12 (December 2001), page 58. The LEMUR II incorporates a number of improvements, including new features, that extend its capabilities beyond those of its predecessor, which is now denoted the LEMUR I. To recapitulate: the LEMUR I was a six-limbed robot for demonstrating robotic capabilities for assembly, maintenance, and inspection. The LEMUR I was designed to be capable of walking autonomously along a truss structure toward a mechanical assembly at a prescribed location and to perform other operations. The LEMUR I was equipped with stereoscopic video cameras and image-data-processing circuitry for navigation and mechanical operations. It was also equipped with a wireless modem, through which it could be commanded remotely. Upon arrival at a mechanical assembly, the LEMUR I would perform simple mechanical operations with one or both of its front limbs. It could also transmit images to a host computer. Each of the six limbs of the LEMUR I was operated independently. Each of the four rear limbs had three degrees of freedom (DOFs), while each of the front two limbs had four DOFs. The front two limbs were designed to hold, operate, and/or be integrated with tools. The LEMUR I included an onboard computer equipped with an assortment of digital control circuits, digital input/output circuits, analog-to-digital converters for input, and digital-to-analog (D/A) converters for output. Feedback from optical encoders in the limb actuators was utilized for closed-loop microcomputer control of the positions and velocities of the actuators. The LEMUR II incorporates the following improvements over the LEMUR I: a) The drive trains for the joints of the LEMUR II are more sophisticated, providing greater torque and accuracy. b) The six limbs are arranged symmetrically about a hexagonal body platform instead of in straight lines along the sides. This symmetrical arrangement is more conducive to omnidirectional movement in a plane. c) The number of degrees of freedom of each of the rear four limbs has been increased by one. Now, every limb has four degrees of freedom: three at the hip (or shoulder, depending on one s perspective) and one at the knee (or elbow, depending on one s perspective). d) Now every limb (instead of only the two front limbs) can perform operations. For this purpose, each limb is tipped with an improved quick-release mechanism for swapping of end-effector tools. e) New end-effector tools have been developed. These include an instrumented rotary driver that accepts all tool bits that have 0.125-in. (3.175-mm)-diameter shanks, a charge-coupled-device video camera, a super bright light-emitting diode for illuminating the work area of the robot, and a generic collet tool that can be quickly and inexpensively modified to accept any cylindrical object up to 0.5 in. (12.7 mm) in diameter. f) The stereoscopic cameras are mounted on a carriage that moves along a circular track, thereby providing for omnidirectional machine vision. g) The control software has been augmented with software that implements innovations reported in two prior NASA Tech Briefs articles: the HIPS algorithm ["Hybrid Image-Plane/Stereo Manipulation" (NPO-30492), Vol. 28, No. 7 (July 2004), page 55] and the CAMPOUT architecture ["An Architecture for Controlling Multiple Robots" (NPO-30345), Vol. 28, No. 10 (October 2004), page 65].
A prototype four-element end-fire microphone array was designed and built for evaluation as a directional acoustic receiver for use in large wind tunnels. The microphone signals were digitized, time delayed, summed, and reconverted to analog form in such a way as to create a directional response with the main lobe along the array axis. The measured array directivity agrees with theoretical predictions confirming the circuit design of the electronic control module. The array with 0.15 m (0.5 ft) microphone spacing rejected reverberations and background noise in the Ames 40- by 80-foot wind tunnel by 5 to 12 db for frequencies above 400 Hz.
The hardware and algorithms used to vector quantize (VQ) predicted pixel intensity differences for real-time video compression are described. The hardware is designed for rapid vector quantization performance, which entails the development of application-specific associative memory circuits. A modified DPCM algorithm is originally examined to determine how neural circuitry could enhance its operation. It was determined that quantization and encoding could be improved by consolidating these two functions into one, and by increasing the amount of information (i.e. number of pixels) quantized at a time. The result is a predictive scheme that vector quantizes differential values. Some of the disadvantages of VQ algorithms are solved using associative memories. The video compression algorithm and the associative memory design are described.
Assembly drawings, logic schematics, and circuit schematics useful in maintaining the equipment of the DC/EC digital test system are reviewed. The drawings are organized in accordance with the reference designations of the hardware. The transmitter subsystem assembly drawings are emphasized.
Circuit designed for measurement of dc current-versus-voltage characteristics of semiconductor devices. Operates in conjunction with x-y pen plotter or digital storage oscilloscope, which records data. Includes large feedback resistors to prevent high currents damaging device under test. Principal virtues: low cost, simplicity, and compactness. Also used to evaluate diodes and transistors.
Vibration Pattern Imager (VPI) system and software designed to control and acquire data from laser vibrometer sensors. Based on personal computer, includes digital signal-processing (DSP) board and analog input/output (I/O) circuit board to control sensors and process data. Originally developed for use with Ometron VPI Sensor, adapted to any commercially available sensor that provides analog output signal and requires analog inputs for control of mirror position. VPI system includes graphical user interface providing for interactive control through keyboard and mouse-selected menu options. Main menu controls all functions for setup, acquisition of data, display, file operations, and leaving program. Two types of data acquired with system: single point or "full field". Written in C language and Texas Instrument' TMS320C30 assembly language.
The fault tolerant characteristics of analog-VLSI artificial neural network (with 32 neurons and 532 synapses) chips are studied by exposing them to high energy electrons, high energy protons, and gamma ionizing radiations under biased and unbiased conditions. The biased chips became nonfunctional after receiving a cumulative dose of less than 20 krads, while the unbiased chips only started to show degradation with a cumulative dose of over 100 krads. As the total radiation dose increased, all the components demonstrated graceful degradation. The analog sigmoidal function of the neuron became steeper (increase in gain), current leakage from the synapses progressively shifted the sigmoidal curve, and the digital memory of the synapses and the memory addressing circuits began to gradually fail. From these radiation experiments, we can learn how to modify certain designs of the neural network electronic hardware without using radiation-hardening techniques to increase its reliability and fault tolerance.
Design and fabrication of analog voltage to duty cycle generator
Digital transmitter designed for Manchester coded signals (and all signals with ac waveforms) generated at a rate of one megabit per second includes efficient output isolation circuit. Transmitter consists of logic control section, amplifier, and output isolation section. Output isolation circuit provides dynamic impedance at terminals as function of amplifier output level.
A digital computer program for analyzing the electromagnetic design of salient, wound pole alternators is presented. The program, which is written in FORTRAN 4, calculates the open-circuit saturation curve, the field-current requirements at rated voltage for various loads and losses, efficiency, reactances, time constants, and weights. The methods used to calculate some of these items are presented or appropriate references are cited. Instructions for using the program and typical program input and output for an alternator design are given, and an alphabetical list of most FORTRAN symbols and the complete program listing with flow charts are included.
Operational and peak holding amplifiers are discussed as useful circuits for bioluminescence assays. Circuit diagrams are provided. While analog methods can give a good integration on short time scales, digital methods were found best for long term integration in bioluminescence assays. Power supplies, a general photometer circuit with ratio capability, and variations in the basic photometer design are also considered.
The concept of designing for reliability will be introduced along with a brief overview of reliability, redundancy and traditional methods of fault tolerance is presented, as applied to current logic devices. The fundamentals of advanced circuit design and analysis techniques will be the primary focus. The introduction will cover the definitions of key device parameters and how analysis is used to prove circuit correctness. Basic design techniques such as synchronous vs asynchronous design, metastable state resolution time/arbiter design, and finite state machine structure/implementation will be reviewed. Advanced topics will be explored such as skew-tolerant circuit design, the use of triple-modular redundancy and circuit hazards, device transients and preventative circuit design, lock-up states in finite state machines generated by logic synthesizers, device transient characteristics, radiation mitigation techniques. worst-case analysis, the use of timing analyzer and simulators, and others. Case studies and lessons learned from spaceflight designs will be given as examples
A telemetry data processing system was defined of the Data Reduction. Data reduction activities in support of the developmental flights of the Space Shuttle were used as references against which requirements are assessed in general terms. A conceptual system design believed to offer significant throughput for the anticipated types of data reduction activities is presented. The design identifies the use of a large, intermediate data store as a key element in a complex of high speed, single purpose processors, each of which performs predesignated, repetitive operations on either raw or partially processed data. The recommended approach to implement the design concept is to adopt an established interface standard and rely heavily on mature or promising technologies which are considered main stream of the integrated circuit industry. The design system concept, is believed to be implementable without reliance on exotic devices and/or operational procedures. Numerical methods were employed to examine the feasibility of digital discrimination of FDM composite signals, and of eliminating line frequency noises in data measurements.
Concept for design of electronic neural network calls for assembly of very-large-scale integrated (VLSI) circuits of few standard types. Each VLSI chip, which contains both analog and digital circuitry, used in modular or "building-block" fashion by interconnecting it in any of variety of ways with other chips. Feedforward neural network in typical situation operates under control of host computer and receives inputs from, and sends outputs to, other equipment.
Integrated circuit performs 1,024 threshold operations in parallel. Designed for use in postprocessing output of optical correlator in optoelectronic neural network. Overall function of device to put out digital signals indicative of location(s) of bright spot(s) on detector plane. Response time less than commercial charge-coupled-device (CCD) imaging detector operating at standard television frame rate.
Although fluxgate magnetometers have been in use for many years, and a number of theoretical studies of these sensors are available, very little information has been published on the engineering choices relating to the detailed design of magnetometers intended for navigational applications in aircraft and other vehicles. This paper addresses some of the problems encountered in the design of the sensing head, the choice of operating mode, and the design of the supporting electronics for a simple low-cost magnetometer system which will produce a digital readout of the magnetic heading of the vehicle in which it is mounted. A major goal of this study has been to develop a design which minimizes circuit complexity, is easy to fabricate and calibrate, and utilizes a minimum of specialized components. Such a magnetometer system is intended either as a stand-alone indicating instrument or as a source of magnetic heading information for a more sophisticated navigational system.
proposed integrated circuit would translate (1) a pair of input signals having a low differential potential and a possibly high common-mode potential into (2) a pair of output signals having the same low differential potential and a low common-mode potential. As used here, "low" and "high" refer to potentials that are, respectively, below or above the nominal supply potential (3.3 V) at which standard complementary metal oxide/semiconductor (CMOS) integrated circuits are designed to operate. The input common-mode potential could lie between 0 and 10 V; the output common-mode potential would be 2 V. This translation would make it possible to process the pair of signals by use of standard 3.3-V CMOS analog and/or mixed-signal (analog and digital) circuitry on the same integrated-circuit chip. A schematic of the circuit is shown in the figure. Standard 3.3-V CMOS circuitry cannot withstand input potentials greater than about 4 V. However, there are many applications that involve low-differential-potential, high-common-mode-potential input signal pairs and in which standard 3.3-V CMOS circuitry, which is relatively inexpensive, would be the most appropriate circuitry for performing other functions on the integrated-circuit chip that handles the high-potential input signals. Thus, there is a need to combine high-voltage input circuitry with standard low-voltage CMOS circuitry on the same integrated-circuit chip. The proposed circuit would satisfy this need. In the proposed circuit, the input signals would be coupled into both a level-shifting pair and a common-mode-sensing pair of CMOS transistors. The output of the level-shifting pair would be fed as input to a differential pair of transistors. The resulting differential current output would pass through six standoff transistors to be mirrored into an output branch by four heterojunction bipolar transistors. The mirrored differential current would be converted back to potential by a pair of diode-connected transistors, which, by virtue of being identical to the input transistors, would reproduce the input differential potential at the output