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Results for “field effect transistor (FET)”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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180 records · Page 10
All sourcesNASA NTRSDOE OSTI
NASA NTRS1988

Development of a unit cell for a Ge:Ga detector array

Two modules of gallium-doped germanium (Ge:Ga) infrared detectors with integrated multiplexing readouts and supporting drive electronics were designed and tested. This development investigated the feasibility of producing two-dimensional Ge:Ga arrays by stacking linear modules in a housing capable of providing uniaxial stress for enhanced long-wavelength response. Each module includes 8 detectors (1x1x2 mm) mounted to a sapphire board. The element spacing is 12 microns. The back faces of the detector elements are beveled with an 18 deg angle, which was proved to significantly enhance optical absorption. Each module includes a different silicon metal-oxide semiconductor field effect transistor (MOSFET) readout. The first circuit was built from discrete MOSFET components; the second incorporated devices taken from low-temperature integrated circuit multiplexers. The latter circuit exhibited much lower stray capacitance and improved stability. Using these switched-FET circuits, it was demonstrated that burst readout, with multiplexer active only during the readout period, could successfully be implemented at approximately 3.5 K.

Source record↗
NASA NTRS2013

Effects of Thermal Cycling on Control and Irradiated EPC 2nd Generation GaN FETs

The power systems for use in NASA space missions must work reliably under harsh conditions including radiation, thermal cycling, and exposure to extreme temperatures. Gallium nitride semiconductors show great promise, but information pertaining to their performance is scarce. Gallium nitride N-channel enhancement-mode field effect transistors made by EPC Corporation in a 2nd generation of manufacturing were exposed to radiation followed by long-term thermal cycling in order to address their reliability for use in space missions. Results of the experimental work are presented and discussed.

field effect transistor↗
DOE OSTI2023

Analysis and Characterization of Four-quadrant Switches based Commutation Cell

A four-quadrant switch (FQS) blocks either polarity voltage and controls current flow in both directions. Unlike voltage-source converters, in which two-quadrant switches operate over a narrow voltage range, four-quadrant switches are required to operate over a wide range of both voltage and current in applications such as matrix converters and current-source converters. Furthermore, matrix converters require multi-step commutation schemes compared to two-step schemes for current-bidirectional switch based voltage-source converters and voltage-bidirectional switch based current-source converters. This paper provides a generalized overview of commutation schemes used for two and four quadrant switches based two-level commutation cells, identifies comparison indices for FQS commutation schemes, and discusses the need for adaptive commutation-step times for wide voltage and current variation applications. Also, the static and dynamic characteristics of 1.2 kV rated FQS implementations utilizing commercial SiC MOSFETs from four different manufacturers and novel monolithic SiC BiDirectional Field Effect Transistor (BiDFET) have been reported.

Commutation cell, four quadrant switch, SiC Bidire↗
DOE OSTI2023

PV Inverter Systems Enabled by Monolithically Integrated SiC based Four Quadrant Power Switch (4-QPS) [BiDFET]

The purpose of this project was to develop a new breed of Power Conversion Systems (PCS) for PV integration that is enabled by the newly developed 4-Quadrant Single Die SiC Power Semiconductor Switches (4-QPS) or also referred to as “Bidirectional FET (BIDFET)”. This work includes semiconductor die development, advanced packaging, converter design, development, and testing of 4-QPS enabled hardware prototypes at 1 kW (for single phase residential application) and 10 kW (for three phase commercial application). The BiDirectional Field-Effect Transistor (BiDFET) can enable circuit topologies requiring four-quadrant switches, that were earlier designed using discrete combinations of MOSFETs, IGBTs, GaN HEMTs, and PiN diodes. The monolithic nature of the BiDFET allows lower device count, smaller switch volume, lower inductance, and simpler packaging, and hence more reliable and commercially viable implementation in power electronics converters. The matrix converter topologies, now feasible using BiDFETs, can eliminate the bulky and unreliable dc link capacitors or inductors required for conventional voltage-source or current-source converters in ac–ac and ac–dc applications. The 1.2 kV BiDFET has the potential to disrupt all the applications utilizing 1.2 kV switches, including electric vehicle (EV) drivetrain, bidirectional EV chargers, industrial motor drives, solid-state transformers, datacenter power supplies, elevator drives, dc microgrids, energy storage grid integration, solid-state breakers, etc.

24 POWER TRANSMISSION AND DISTRIBUTION↗
NASA NTRS1971

Development of improved pyroelectric detectors; Literature survey of pyroelectric materials and their characteristics

The object of this program is to improve the detectivity of the pyroelectric detector with the ultimate goal of operation at or near the temperature-noise limit. Two general areas of investigation are undertaken. The first is to improve responsivity through the use of new materials. The second is directed toward reduction of noise and will be effected with improved field effect transistor characteristics, and improved electroding of the pyroelectric material. The search for new materials has begun with a review of the literature on pyroelectric materials in several languages. The compiled data includes an extensive list of references. From this, several materials have already been selected for investigation. FETs are being obtained from various manufacturers, evaluated, and selected units will be tested with pyroelectric elements as complete detectors.

Weiner, S.↗
NASA NTRS1972

Development of improved pyroelectric detectors: Measurements of pyroelectric material characteristics and FET characteristics

The object of this program is to improve the detectivity of the pyroelectric detector with the ultimate goal of operation at or near the temperature noise limit. Two general areas of investigation are undertaken. The first is to improve responsivity through the use of new materials. The second is directed toward reduction of noise and will be effected with improved field effect transistor characteristics, and improved electroding of the pyroelectric material. The review of the literature on pyroelectric materials continues. From this, several materials have already been selected for investigation, and several were tested.

Weiner, S.↗
NASA NTRS2009

Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate

Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.

Phillips, Thomas A.↗
DOE OSTI2020

Atomically Precise PdSe 2 Pentagonal Nanoribbons

We report atomically precise pentagonal PdSe 2 nanoribbons (PNRs) fabricated on a pristine PdSe 2 substrate with a hybrid method of top-down and bottom-up processes. The PNRs form a uniform array of dimer structure with a width of 2.4 nm and length of more than 200 nm. In situ four-probe scanning tunneling microscopy (STM) reveals metallic behavior of PNRs with ballistic transport for at least 20 nm in length. Density functional theory calculations produce a semiconducting density of states of isolated PNRs and find that the band gap narrows and disappears quickly once considering coupling between PNR stacking layers or interaction with the PdSe 2 substrate. The coupling of PNRs is further corroborated by Raman spectroscopy and field-effect transistor measurements. The facile method of fabricating atomically precise PNRs offers an air-stable functional material for dimensional control.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Ferroelectric FET-based context-switching FPGA enabling dynamic reconfiguration for adaptive deep learning machines

Field programmable gate array (FPGA) is widely used in the acceleration of deep learning applications because of its reconfigurability, flexibility, and fast time-to-market. However, conventional FPGA suffers from the trade-off between chip area and reconfiguration latency, making efficient FPGA accelerations that require switching between multiple configurations still elusive. Here, we propose a ferroelectric field-effect transistor (FeFET)–based context-switching FPGA supporting dynamic reconfiguration to break this trade-off, enabling loading of arbitrary configuration without interrupting the active configuration execution. Leveraging the intrinsic structure and nonvolatility of FeFETs, compact FPGA primitives are proposed and experimentally verified. The evaluation results show our design shows a 63.0%/74.7% reduction in a look-up table (LUT)/connection block (CB) area and 82.7%/53.6% reduction in CB/switch box power consumption with a minimal penalty in the critical path delay (9.6%). Besides, our design yields significant time savings by 78.7 and 20.3% on average for context-switching and dynamic reconfiguration applications, respectively.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1987

Microwave performance of InAlAs/InGaAs/InP MODFET's

Modulation-doped InAlAs/InGaAs/InP structures were grown by molecular beam epitaxy and fabricated into FETs with excellent RF gain performance. The intrinsic transconductance was about 400 mS/mm at 300 K. Current gain cutoff frequencies of up to 26.5 GHz were obtained in 1-micron gate devices. Extremely small S12 and large S21 led to a very large F(max) of 62 GHz. These results represent the best reported figures for 1-micron devices in this material system, and slightly better than those obtained in recently developed pseudomorphic modulation-doped field effect transistors.

Peng, C. K.↗
DOE OSTI2022

Ultra‐Narrow Phosphorene Nanoribbons Produced by Facile Electrochemical Process

Abstract Phosphorene nanoribbons (PNRs) have inspired strong research interests to explore their exciting properties that are associated with the unique two‐dimensional (2D) structure of phosphorene as well as the additional quantum confinement of the nanoribbon morphology, providing new materials strategy for electronic and optoelectronic applications. Despite several important properties of PNRs, the production of these structures with narrow widths is still a great challenge. Here, a facile and straightforward approach to synthesize PNRs via an electrochemical process that utilize the anisotropic Na + diffusion barrier in black phosphorus (BP) along the [001] zigzag direction against the [100] armchair direction, is reported. The produced PNRs display widths of good uniformity (10.3 ± 3.8 nm) observed by high‐resolution transmission electron microscopy, and the suppressed B 2g vibrational mode from Raman spectroscopy results. More interestingly, when used in field‐effect transistors, synthesized bundles exhibit the n‐type behavior, which is dramatically different from bulk BP flakes which are p‐type. This work provides insights into a new synthesis approach of PNRs with confined widths, paving the way toward the development of phosphorene and other highly anisotropic nanoribbon materials for high‐quality electronic applications.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2023

Embedding security into ferroelectric FET array via in situ memory operation

Non-volatile memories (NVMs) have the potential to reshape next-generation memory systems because of their promising properties of near-zero leakage power consumption, high density and non-volatility. However, NVMs also face critical security threats that exploit the non-volatile property. Compared to volatile memory, the capability of retaining data even after power down makes NVM more vulnerable. Existing solutions to address the security issues of NVMs are mainly based on Advanced Encryption Standard (AES), which incurs significant performance and power overhead. In this paper, we propose a lightweight memory encryption/decryption scheme by exploiting in-situ memory operations with negligible overhead. To validate the feasibility of the encryption/decryption scheme, device-level and array-level experiments are performed using ferroelectric field effect transistor (FeFET) as an example NVM without loss of generality. Besides, a comprehensive evaluation is performed on a 128 × 128 FeFET AND-type memory array in terms of area, latency, power and throughput. Compared with the AES-based scheme, our scheme shows ~22.6×/~14.1× increase in encryption/decryption throughput with negligible power penalty. Furthermore, we evaluate the performance of our scheme over the AES-based scheme when deploying different neural network workloads. Our scheme yields significant latency reduction by 90% on average for encryption and decryption processes.

47 OTHER INSTRUMENTATION↗
DOE OSTI2023

Rapid, Sensitive, Label-Free Electrical Detection of SARS-CoV-2 in Nasal Swab Samples

Rapid diagnosis of coronavirus disease 2019 (COVID-19) is key for the long-term control of severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2) amid renewed threats of mutated SARS-CoV-2 around the world. Here, we report on an electrical label-free detection of SARS-CoV-2 in nasopharyngeal swab samples directly collected from outpatients or in saliva-relevant conditions by using a remote floating-gate field-effect transistor (RFGFET) with a 2-dimensional reduced graphene oxide (rGO) sensing membrane. RFGFET sensors demonstrate rapid detection (<5 min), a 90.6% accuracy from 8 nasal swab samples measured by 4 different devices for each sample, and a coefficient of variation (CV) < 6%. Also, RFGFET sensors display a limit of detection (LOD) of pseudo-SARS-CoV-2 that is 10 000-fold lower than enzyme-linked immunosorbent assays, with a comparable LOD to that of reverse transcriptionpolymerase chain reaction (RT-PCR) for patient samples. To achieve this, comprehensive systematic studies were performed regarding interactions between SARS-CoV-2 and spike proteins, neutralizing antibodies, and angiotensin-converting enzyme 2, as either a biomarker (detection target) or a sensing probe (receptor) functionalized on the rGO sensing membrane. Finally, taken together, this work may have an immense effect on positioning FET bioelectronics for rapid SARS-CoV-2 diagnostics.

60 APPLIED LIFE SCIENCES↗
NASA NTRS2009

SiC Optically Modulated Field-Effect Transistor

An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification of the photon-detection signal. A family of operating curves characterizing the OFET can be generated in a series of measurements performed at different intensities of incident ultraviolet light.

Tabib-Azar, Massood↗
NASA NTRS2008

Logic Gates Made of N-Channel JFETs and Epitaxial Resistors

Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform the desired functions throughout the ranges over which the parameters of the JFETs are distributed. The supply rails V(sub dd) and V(sub ss) and the resistors R are chosen as functions of the distribution of direct-current operating parameters of the group of transistors used.

Krasowski, Michael J.↗
DOE OSTI2023

Bidirectional Three-phase Current Source Converter based Buck-boost AC/DC System using Bidirectional Switches

The 1.2 kV 4H-SiC BiDirectional Field Effect Transistor (BiDFET) is the first monolithic SiC bidirectional switch, which offers a lower voltage drop and semiconductor devices count alternative to the reverse-voltage-blocking (RB) switch used in the current-source converters (CSC). The bidirectional switch based CSC also allows DC-link current reversal for bidirectional power flow and provides multiple system-level benefits in a buck-boost AC/DC system consisting of buck-type DC/DC converter and CSC. This paper discusses the selection of buck converter duty cycle and CSC modulation index for the system’s buck-boost operation with a wide variation in DC voltage. CSC modulation schemes categorized based on the number of hard-turn-on transitions per switching cycle are also analyzed along with the three-step and four-step commutation schemes that are essential for the CSC commutation cells. Finally, the different schemes are evaluated and compared through the experimental results of a 10 kW, 480 VRMS, LL/ (400 − 800) V AC/DC system.

Bidirectional switches, four-quadrant switches, cu↗
DOE OSTI2024

A portable and reusable sensor system based on graphene for real-time and sensitive detection of lead ions in water

Long-term exposure to Pb 2+ can cause irreversible damage to the nervous, cardiovascular, and reproductive systems. Therefore, developing a fast and sensitive detection system capable of monitoring minuscule concentrations of Pb 2+ is essential. In this study, we demonstrated a fully portable sensor system enabling rapid, sensitive, and real-time monitoring of Pb 2+ . The sensor system adopted the remote-gate field-effect transistor (RGFET) detection scheme and was easy to operate, even for non-experts. The sensor system comprised two printed circuit boards (PCBs): a sensor PCB with a remote-gate electrode and an analyzer PCB with a metal-oxide-semiconductor field-effect transistor (MOSFET) transducer and peripheral electronics to manage sensor signals. To achieve a high sensitivity for Pb 2+ , we utilized graphene ink drop-casted on the sensor PCB as a sensing membrane. The graphene film was easy to deposit and remove, enabling the sensor PCB to be reused multiple times. The sensor system was further linked to a smartphone application that instantly monitors the sensor response, allowing for rapid point-of-use detection. The sensor exhibited a high sensitivity of 21.7% when the limit of detection (LOD) value of 1 nM (∼0.2 ppb) was detected, and the typical detection time for each sample was approximately 60 seconds. This portable sensor system advances sensing technologies and could potentially supplement expensive, laborious conventional sensing equipment.

54 ENVIRONMENTAL SCIENCES↗
DOE OSTI2024

Trap Passivation for Reducing On-Resistance and Saturation Voltage in Wafer-Bonded InGaAs-Channel/GaN-Drain Vertical FETs

High frequency and high power are the driving forces behind semiconductor transistor technology. However, conventional devices have the tradeoff of either being high speed or high breakdown—but not both. Wafer-bonded current aperture vertical electron transistors (BAVETs) help eliminate the tradeoff by combining a high-speed III-As channel to a high-breakdown III-N drift region. The device presented herein comprises of an InAlAs gate-barrier/InGaAs channel, wafer-bonded to an InGaN/GaN drift region, with the InGaAs/InGaN interface referred to as the wafer-bonded interface (WBI). The electronic behavior of WBIs is yet less known but necessary in realizing the potential of a BAVET. Herein, strong trap activity at the WBI is shown to be the cause of abnormally high saturation voltage ( V DS_SAT ) in BAVETs. The traps cause unintentional space charge (SC) region in the drain region of the device. This causes a drain resistance, a higher ON-resistance ( R ON ), and a higher V DS_SAT . Here, the challenge is overcome by hydrogen passivation of traps at WBI by using a p-doping for the InAlAs layer, which reduces the trap-charge concentration at the WBI. Consequently, the width of the SC region is reduced and a reduction in V DS_SAT is demonstrated, wherein it reduces from >12 to 5 V.

36 MATERIALS SCIENCE↗