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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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175 records · Page 10

NiGa 2 O 4 interfacial layers in NiO/Ga 2 O 3 heterojunction diodes at high temperature

NiO/Ga 2 O 3 heterojunction diodes have attracted attention for high-power applications, but their high temperature performance and reliability remain underexplored. Here, we report the time evolution of the electrical properties in the widely studied p-NiO/n-Ga 2 O 3 heterojunction diodes and formation of NiGa 2 O 4 interfacial layers at high temperatures. Results of our thermal cycling experiment show an initial leakage current increase which stabilizes after sustained thermal load, due to reactions at the NiO–Ga 2 O 3 interface. High-resolution TEM microstructure analysis of the devices after thermal cycling indicates that the NiO–Ga 2 O 3 interface forms a ternary compound at high temperatures, and thermodynamic calculations suggest the formation of the spinel NiGa 2 O 4 layer between NiO and Ga 2 O 3 . First-principles defect calculations find that NiGa 2 O 4 shows low p-type intrinsic doping and hence can serve to limit electric field crowding at the interface. Vertical NiO/ Ga 2 O 3 diodes with intentionally grown 5 nm thin spinel-type NiGa 2 O 4 interfacial layers show an excellent device ON/OFF ratio of >10 10 (± 3 V), V ON of ~1.9 V, and increased breakdown voltage of ~1.2 kV for an initial unoptimized 300 lm diameter device. These p–n heterojunction diodes are promising for high-voltage, high temperature applications.

30 DIRECT ENERGY CONVERSION↗

Electronic properties of corundum-like Ir 2 O 3 and Ir 2 O 3 -Ga 2 O 3 alloys

In the hexagonal, corundum-like structure, α-Ga 2 O 3 has a bandgap of ~5.1 eV, which, combined with its relatively small electron effective mass, high Baliga's figure of merit, and high breakdown field, makes it a promising candidate for power electronics. Ga 2 O 3 is easy to dope n-type, but impossible to dope p-type, impeding the realization of some electronic device designs. Developing a lattice-matched p-type material that forms a high-quality heterojunction with n-type Ga 2 O 3 would open new opportunities in electronics and perhaps optoelectronic devices. In this work, we studied Ir 2 O 3 as a candidate for that purpose. Using hybrid density functional theory calculations we predict the electronic band structure of α-Ir 2 O 3 and compare that to α-Ga 2 O 3 , and study the stability and electronic properties of α-(Ir x Ga 1–x ) 2 O 3 alloys. We discuss the band offset between the two materials and compare it with recently available experimental data. We find that the Ir d bands that compose the top of the valence band in α-Ir 2 O 3 are much higher in energy than O p bands in α-Ga 2 O 3 , possibly enabling effective p-type doping. Finally, our results provide an insight into using the Ir 2 O 3 or Ir 2 O 3 -Ga 2 O 3 alloys as p-type material lattice-matched to α-Ga 2 O 3 for the realization of p–n heterojunctions.

36 MATERIALS SCIENCE↗

CdSeTe solar-cell performance with different dopant types

Four doping conditions were explored for CdTe-based solar cells: p-type As and P, n-type Al, and no intentional doping. In each case, the CdTe absorber was alloyed with Se, but only near the normal front-side, light entry for the cells, while the dopants were added from the back. Cells with p-dopants showed efficiencies up to 20% with front-side illumination, but the n-doped and undoped ones were close to zero. With back-side illumination, this was reversed with undoped up to 8% and p-doped ones only about 2%. These results are explained by Kelvin-probe measurements of electric-field profiles, which showed that the diode field was near the front for the higher-efficiency p-doping, but near the back for undoped and n-doped.

14 SOLAR ENERGY↗

Inverse metal-assisted chemical etching of germanium with gold and hydrogen peroxide

Abstract Metal-assisted chemical etching (MACE) is a flexible technique for texturing the surface of semiconductors. In this work, we study the spatial variation of the etch profile, the effect of angular orientation relative to the crystallographic planes, and the effect of doping type. We employ gold in direct contact with germanium as the metal catalyst, and dilute hydrogen peroxide solution as the chemical etchant. With this catalyst-etchant combination, we observe inverse-MACE, where the area directly under gold is not etched, but the neighboring, exposed germanium experiences enhanced etching. This enhancement in etching decays exponentially with the lateral distance from the gold structure. An empirical formula for the gold-enhanced etching depth as a function of lateral distance from the edge of the gold film is extracted from the experimentally measured etch profiles. The lateral range of enhanced etching is approximately 10–20 μ m and is independent of etchant concentration. At length scales beyond a few microns, the etching enhancement is independent of the orientation with respect to the germanium crystallographic planes. The etch rate as a function of etchant concentration follows a power law with exponent smaller than 1. The observed etch rates and profiles are independent of whether the germanium substrate is n-type, p-type, or nearly intrinsic.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Phonon-Assisted Auger-Meitner Recombination in Silicon from First Principles

Here, we present a consistent first-principles methodology to study both direct and phonon-assisted Auger-Meitner recombination (AMR) in indirect-gap semiconductors that we apply to investigate the microscopic origin of AMR processes in silicon. Our results are in excellent agreement with experimental measurements and show that phonon-assisted contributions dominate the recombination rate in both n-type and p-type silicon, demonstrating the critical role of phonons in enabling AMR. We also decompose the overall rates into contributions from specific phonons and electronic valleys to further elucidate the microscopic origins of AMR. Our results highlight potential pathways to modify the AMR rate in silicon via strain engineering.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Mitigation of the internal p-n junction in CoS 2 -contacted FeS 2 single crystals: Accessing bulk semiconducting transport

Pyrite FeS 2 is an outstanding candidate for a low-cost, nontoxic, sustainable photovoltaic material, but efficient pyrite-based solar cells are yet to materialize. Recent studies of single crystals have shed much light on this by uncovering a p-type surface inversion layer on n-type (S-vacancy doped) crystals, and the resulting internal p-n junction. This leaky internal junction likely plays a key role in limiting efficiency in pyrite-based photovoltaic devices, also obscuring the true bulk semiconducting transport properties of pyrite crystals. Here, we demonstrate complete mitigation of the internal p-n junction in FeS 2 crystals by fabricating metallic CoS 2 contacts via a process that simultaneously diffuses Co (a shallow donor) into the crystal, the resulting heavy n doping yielding direct Ohmic contact to the interior. Low-temperature bulk transport studies of controllably Co- and S-vacancy doped semiconducting crystals then enable a host of previously inaccessible observations and measurements, including determination of donor activation energies (which are as low as 5 meV for Co), observation of an unexpected second activated transport regime, realization of electron mobility up to 2100 cm 2 V –1 s –1 , elucidation of very different mobilities in Co- and S-vacancy-doped cases, and observation of an abrupt temperaturedependent crossover to bulk Efros-Shklovskii variable-range hopping, accompanied by an unusual form of nonlinear Hall effect. Aspects of the results are interpreted with the aid of first-principles electronic structure calculations on both Co- and S-vacancy-doped FeS 2 . Furthermore, this work thus demonstrates unequivocal mitigation of the internal p-n junction in pyrite single crystals, with important implications for both future fundamental studies and photovoltaic devices

36 MATERIALS SCIENCE↗

Implanted Guard Ring Edge Termination With Avalanche Capability for Vertical GaN Devices

Edge termination is the key building block in power devices to enable near-ideal, avalanche breakdown voltage (BV). Here, this work presents the design, fabrication, and physics of a GaN guard ring (GR) edge termination formed by selective-area nitrogen implantation through an epitaxial p-GaN layer. The fabrication of this termination only includes a single implantation step that does not require precise control of implant depth, rendering a large process latitude. The selective-area implantation produces p-GaN rings that are separated by the implanted, semi-insulating regions. The number and spacing of the p-type rings are found to determine the BV of the vertical GaN p-n diode. The 16-ring structure enables a BV of 1800 V, being 88% of the theoretical 1-D parallel-plane limit. Avalanche characteristics are observed in devices with a large variety of GR designs. Finally, we present a comprehensive survey on the efficiency, fabrication complexity, real estate, and avalanche capability of various edge termination techniques that have been reported in vertical GaN devices. The high efficiency (among the highest reported in avalanche-capable GaN terminations), simple and robust fabrication process, and uniform avalanche capability make this implanted GR a promising edge termination for high-voltage GaN devices.

42 ENGINEERING↗

Performance of Scintillation Detectors Based on Quantum Dots in a Semiconductor Matrix (Final Technical Report)

InAs Quantum Dots (QDs) embedded into GaAs semiconductor waveguide have unique scintillation properties, valuable for nuclear security, medical imaging, and high energy physics. In this work, we developed thick (~25um) epitaxial heterostructres with high luminescence efficiency composed of self-assembled nano-engineered InAs QDs grown by molecular beam epitaxy. In this type of detector, the GaAs matrix acts as a stopping material for charged particles or photons generating electrons captured by the QDs acting as luminescence centers. The QD medium is designed to provide fast capture of electrons into QDs (few ps), high QD luminescence efficiency at room temperature (>50%), and strong red-shift of photoluminescence (PL) from the GaAs absorption edge (>250nm). Typical devices consist of a 10-25um thick GaAs layer with embedded sheets of modulation p-type doped InAs QDs and an InGaAs photodetector tuned to the QD emission wavelength. The thick GaAs layer acts also as a waveguide when layer-transferred onto a low-index substrate. Waveguiding and self-absorption (~1cm -1 ) were studied using photoluminescence with scanning laser excitation and modeled with ray optics approximation and geometrical coupling of high-index waveguide to a collection fiber. Scintillating signals from α-particles were analyzed with both an external photodiode (PD) and an integrated PD which provided an improved optical coupling. In the former case, the external InGaAs PD was air-coupled to the scintillator and had the light collection efficiency of about 1% corresponding to limited light extraction through a planar interface with air due to total internal reflection. The mean charge collected by the integrated PD was in the range of (3÷5)×10 4 photoelectrons per 1 MeV of deposited energy, or ~13-20% of the theoretically achievable light yield. Timing of the integrated device was measured by wire-bonding it to the input of an 8 GHz IC. The scintillation response shows an extremely fast 0.3-0.6 ns decay constant and about 40-70 ps time resolution, limited by the system noise. The combined light yield and decay time makes the InAs/GaAs QD heterostructures the fastest high yield scintillation material reported making it valuable for high energy physics and medical imaging applications.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

High Temperature Thick Film Sensor Development Based on Refractory Oxide Semiconductors

Solid-state, high-temperature sensing devices are required for accurate temperature, strain/stress, and failure monitoring for a range of advanced manufacturing, transportation, and military applications. High temperature conditions limit sensing strategies, where typically traditional metal and semiconductor materials are unstable, and the sensing options are limited to optical spectroscopy methods. In addition, strategies to embed the sensors directly within active components and protective thermal refractory are of interest that permit near-environment sensing which is not possible with the traditional electronic materials and components. Rare-earth chromite semiconductors exhibit some properties of interest for high temperature sensing technologies, such as: high microstructure and chemical stability, relatively high electronic conductivity at high temperatures, and relative thermal expansion coefficient matching to refractory thermal protective insulation (such as high-zirconia and -alumina ceramics). In this work, n-type and p-type doped lanthanum chromites compositions were computationally modelled and prepared, and the electrical, thermoelectric, and thermomechanical properties were measured for the obtained material systems. A few compositions were then processed into thick film health and temperature sensors and tested at high temperatures. To establish relative stability under harsh environment conditions, post- mortem microstructure and chemical composition was characterized after extended and cycle testing at high temperatures.

20 FOSSIL-FUELED POWER PLANTS↗

SMART SiC Power ICs: Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (Final Technical Report)

This collaborative project was initiated with the goal of developing Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (SMART SiC Power ICs). In pursuit of this objective, innovative designs and fabrication processes were implemented, enabling the development of large-scale (>1 cm²) SiC Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuits and high-voltage (400–600 V) lateral power MOSFETs (HV-LDMOS) on 150 mm 4H-SiC substrates. The resulting SMART SiC Power ICs are tailored to support a wide range of applications requiring diverse voltage and power levels, including automotive systems, industrial equipment, electronic data processing, energy harvesting, and power conditioning. To achieve the proposed ‘SMART’ technology for SiC ICs, the team focused on 1) the Development of highly scalable CMOS (with high channel mobilities for n-type and p-type MOSFETs), LDMOS (~600V, 10A rated), and IC technologies, 2) Establishment of a manufacturable process baseline in a production-grade-, 150mm, SiC fabrication facility, and 3) Demonstration of SMART SiC ICs. The project initially comprised of fabricating 5 lots. In lot 1 monolithic integration using a single process was achieved. Here, we were able to successfully accomplish Integrated HV NMOSFET with LV CMOS on N-epi/N+ Substrate. The HV NMOS demonstrated a Breakdown Voltage (BV) more than 600V. Circuit demonstration of CMOS was also another achievement from this lot. In lot 2, priority was in place for isolation and integration. Here we addressed the isolation concerns and integrated the HV NMOS and LV CMOS using the N-epi/P-epi/N+ substrate. Similar to the lot 1, we were able to achieve a BV of 600 V for HV NMOS. Optimized gate oxide process with high channel mobilities, better gate oxide reliability, development of SPICE models, successful ohmic process development, novel wafer area saving design layouts, P+ isolation schemes with channeling implantations and high temperature operational circuits demonstrations are some of the key highlights from lot 1 and lot2. In lot 3, discrete device performances of HV NMOS with a BV ~700V and reliable LV CMOS performances were achieved. Also, novel architectural solutions were successfully implemented to suppress the electric field crowding at the gate oxide for reliable operations. In lot 4, half bridge power driver ICs with a conversion efficiency of (target 90% to 95%) in the 1-5MHz switching frequency range for output power between 25 W to 3 kW have been included in. However, due to the unfortunate events of sudden foundry shutdown (SiCamore Semi) the processing of lot 4 wafers came to a complete stop (January 2024). Arrangements have recently been made to shift the fabrication to another foundry, General Electric Aerospace. The fabrication process now on course (as of December 2024). Characterizations are delayed due to this unfortunate circumstance. The proposed trench architectural-based devices and ICs (lot 5) underwent modifications from the original project proposal. This change was necessitated by limitations in the availability of trench-based processes at commercial production-grade fabrication facilities in the US. Apart from above achievements, a Process Development Kit (PDK) was successfully developed for planar type SiC CMOS/LDMOS.

42 ENGINEERING↗

Using a carbon vacancy reduction material to increase average carrier lifetime in a silicon carbide semiconductor device

A semiconductor die and a process for fabricating the semiconductor die are disclosed. The semiconductor die has a substrate and a silicon carbide (SiC) epitaxial structure on the substrate. The SiC epitaxial structure includes at least a first N-type SiC layer, at least a first P-type SiC layer, and carbon vacancy reduction material, which has been implanted into a surface of the SiC epitaxial structure. Further, the SiC epitaxial structure has been annealed to mobilize the carbon vacancy reduction material to diffuse carbon atoms substantially throughout the SiC epitaxial structure, thereby increasing an average carrier lifetime in the SiC epitaxial structure.

36 MATERIALS SCIENCE↗

Computational Fermi Level Engineering and Doping-Type Conversion of Ga2O3 Via Three-Step Processing

Ga2O3 is being actively explored for power electronics, and other applications due to its ultra- wide bandgap and low projected fabrication cost of high-quality crystals. N-type doping of Ga2O3 can be achieved and tuned, but p-type doping faces fundamental obstacles. Successful engineering of Ga2O3 based devices requires critical control of doping density, Fermi level position, providing opportunities for predictive process simulation. We use first-principles defect equilibrium calculations to simulate a 3-step growth- annealing-quench protocol for hydrogen assisted Mg doping in Ga2O3, taking into account the hydrogen- oxygen-water gas phase equilibrium. We predict type conversion to a net p-type regime following O-rich annealing after growth under reducing conditions in the presence of H2. We show that there is an optimal temperature that maximizes the net acceptor density during the equilibrium annealing step for a given Mg doping level. Quenching of non-equilibrium annealed samples then results in a Fermi level EF below mid-gap down to about EV +1.5 eV, creating a significant number of uncompensated neutral MgGa0 acceptors. This type converted Ga2O3 can create significant built-in field in a p-n junction with an adjoining n-type material and could enable vertical MOSFETs.

CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS,M↗

Computational Fermi Level Engineering and Doping-Type Conversion of Ga2O3 Via Three-Step Processing

Ga2O3 is being actively explored for power electronics, deep-ultraviolet optoelectronics, and other applications due to its ultra-wide bandgap and low projected fabrication cost of large-size and high-quality crystals. N-type doping of Ga2O3 can be achieved and tuned, but p-type doping faces fundamental obstacles due to deep character of acceptor levels and polaron transport of resulting holes. However, successful engineering of Ga2O3 based devices requires critical control of doping density, Fermi level position, and free carrier concentration, providing opportunities for predictive process simulation. We use first-principles defect theory and defect equilibrium calculations to simulate a 3-step growth-annealing-quench protocol for hydrogen assisted Mg doping in Ga2O3, taking into account the hydrogen-oxygen-water gas phase equilibrium. We predict type conversion to a net p-type regime following O-rich annealing after growth under reducing conditions in the presence of H2. This process is similar to the Mg acceptor activation by H removal in GaN. We show that there is an optimal temperature that maximizes the net acceptor density during the equilibrium annealing step for a given Mg doping level. Quenching of non-equilibrium annealed samples then results in a Fermi level EF below mid-gap down to about EV +1.5 eV, creating a significant number of uncompensated neutral MgGa0 acceptors. The resulting free hole concentration in quenched samples is very low (109 – 1012 cm-3) due to deep energy level of these Mg acceptors, but this type converted Ga2O3 material can create a significant built-in field in a p-n junction with an adjoining n-type material. Additionally, the electron concentration is greatly suppressed in such acceptor-doped Ga2O3, which could enable the use as a current blocking layer to fabricate normally-off (enhancement-mode) vertical Ga2O3 based metal-oxide-semiconductor field effect transistors (MOSFETs), and as a guard ring for edge termination in MOSFETs and Schottky barrier diodes (SBDs) with increased breakdown voltage.

CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS,M↗