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182 records · Page 11

Stirling Engine Controller

Stirling technology is being developed to replace RTG s (Radioisotope Thermoelectric Generators), more specifically a stirling convertor, which is a stirling engine coupled to a linear alternator. Over the past three decades, the stirling engine has been designed to perform different functions. Stirling convertors have been designed to decrease fuel consumption in automobiles. They have also been designed for terrestrial and space applications. Currently NASA Glenn is using the convertor for space based applications. A stiring converter is a better means of power for deep space mission and "dusty" mission, like the Mars Rovers, than solar panels because it is not affected by dust. Spirit and Opportunity, two Mars rovers currently navigating the planet, are losing their ability to generate electricity because dust is collecting on their solar panels. Opportunity is losing more energy because its robotic arm has a heater with a switch that can not be turned off. The heater is not needed at night, but yet still runs. This generates a greater loss of electricity and in turn diminishes the performance of the rover. The stirling cycle has the potential to provide very efficient conversion of heat energy to electric a1 energy, more so than RTG's. The stirling engine converts the thermal energy produced by the decaying radioisotope to mechanical energy; the linear alternator converts this into electricity. convertor. Since the early 1990's tests have been performed to maximize the efficiency of the stirling converter. Many months, even years, are dedicated to preparing and performing tests. Currently, two stirling convertors #'s 13 and 14, which were developed by Stirling Technology Company, are on an extended operation test. As of June 7th, the two convertors reached 7,500 hours each of operation. Before the convertors could run unattended, many safety precautions had to be examined. So, special instrumentation and circuits were developed to detect off nominal conditions and also safely shutdown the engines. The test will last for a period of 8000 to 9000 hours. Other types of tests that have been performed are: performance mapping, controller development, launch environment, and vibration emissions testing. Currently, the thermo-mechanical system branch is housing a RG-350, a stirling convertor. The convertor was used in previous tests such as a Hall Thruster test, world s first integrated test of a dynamic power system with electric propulsion. Another test performed was to conclude if free piston stirling convertors can be synchronized for vibration balancing, with no thermodynamic or electrical connections and not cause both to shutdown if one failed. The ability to reduce vibration by synchronizing convertor operation but still be able to operate when one partner fails is pertinent in space and terrestrial applications. The convertor is now being brought back into operation and a controller is in the process of being developed. This convertor will be used as a testbed for new controllers. I worked with Mary Ellen Roth on the electric engineering aspects of the RG-350. My main goal was to enhance the data collection process. I worked on different aspects of the RG-350, with a main focus on the engine controller. I drew a schematic of the wire connections in the engine controller, using PCB Express, so that a plan could be devised to connect the power meter properly between the output of the engine and the engine controller. I measured the power using two different instruments: Valhalla Scientific power meter and Ohio Semitronics power measurement device. The convertor is connected to an Agilent 34970A Data Acquisition/Switch Unit, which allows the user to measure, record, and monitor voltage, current, frequency, and temperature. I assisted in preparing the Data Acquisition for general operation. I also helped test a panel of transducers, which will be placed in the rack that powers and monitors the convertor.

Blaze, Gina M.↗

Using LDPC Code Constraints to Aid Recovery of Symbol Timing

A method of utilizing information available in the constraints imposed by a low-density parity-check (LDPC) code has been proposed as a means of aiding the recovery of symbol timing in the reception of a binary-phase-shift-keying (BPSK) signal representing such a code in the presence of noise, timing error, and/or Doppler shift between the transmitter and the receiver. This method and the receiver architecture in which it would be implemented belong to a class of timing-recovery methods and corresponding receiver architectures characterized as pilotless in that they do not require transmission and reception of pilot signals. Acquisition and tracking of a signal of the type described above have traditionally been performed upstream of, and independently of, decoding and have typically involved utilization of a phase-locked loop (PLL). However, the LDPC decoding process, which is iterative, provides information that can be fed back to the timing-recovery receiver circuits to improve performance significantly over that attainable in the absence of such feedback. Prior methods of coupling LDPC decoding with timing recovery had focused on the use of output code words produced as the iterations progress. In contrast, in the present method, one exploits the information available from the metrics computed for the constraint nodes of an LDPC code during the decoding process. In addition, the method involves the use of a waveform model that captures, better than do the waveform models of the prior methods, distortions introduced by receiver timing errors and transmitter/ receiver motions. An LDPC code is commonly represented by use of a bipartite graph containing two sets of nodes. In the graph corresponding to an (n,k) code, the n variable nodes correspond to the code word symbols and the n-k constraint nodes represent the constraints that the code places on the variable nodes in order for them to form a valid code word. The decoding procedure involves iterative computation of values associated with these nodes. A constraint node represents a parity-check equation using a set of variable nodes as inputs. A valid decoded code word is obtained if all parity-check equations are satisfied. After each iteration, the metrics associated with each constraint node can be evaluated to determine the status of the associated parity check. Heretofore, normally, these metrics would be utilized only within the LDPC decoding process to assess whether or not variable nodes had converged to a codeword. In the present method, it is recognized that these metrics can be used to determine accuracy of the timing estimates used in acquiring the sampled data that constitute the input to the LDPC decoder. In fact, the number of constraints that are satisfied exhibits a peak near the optimal timing estimate. Coarse timing estimation (or first-stage estimation as described below) is found via a parametric search for this peak. The present method calls for a two-stage receiver architecture illustrated in the figure. The first stage would correct large time delays and frequency offsets; the second stage would track random walks and correct residual time and frequency offsets. In the first stage, constraint-node feedback from the LDPC decoder would be employed in a search algorithm in which the searches would be performed in successively narrower windows to find the correct time delay and/or frequency offset. The second stage would include a conventional first-order PLL with a decision-aided timing-error detector that would utilize, as its decision aid, decoded symbols from the LDPC decoder. The method has been tested by means of computational simulations in cases involving various timing and frequency errors. The results of the simulations ined in the ideal case of perfect timing in the receiver.

Jones, Christopher↗