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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Phasor-Domain Modeling of Inverter Based Resources Considering Unbalanced Grid Faults

A significant increase in inverter-based distributed energy resources (DERs) is expected in distribution systems of the near future. The latest phasor modeling approach of DERs with emerging control technologies can capture relevant dynamics in large-scale three-phase distribution systems with unbalanced construction. However, there is a lack of appropriate phasor models to deal with unbalanced fault scenarios. As such, this paper describes per-phase phasor modeling approach appropriate for unbalanced grid disturbance studies in distribution systems with high penetration of DERs. The overall modeling performance of representative DERs is simulated in phasor domain GridLAB-D environment and validated against controller hardware-in-the loop (CHIL) testing or electromagnetic transient (EMT) based switching model simulation in PSCAD with test cases including different unbalanced grid faults. The high accuracy retained from the simulation verifies the effectiveness of the proposed phasor modeling approach considering interactions between positive and negative sequence signals.

Chen, Zhe↗
DOE OSTI2023

Quantum Computing and Visualization: A Disruptive Technological Change Ahead

The focus of this Visualization Viewpoints article is to provide some background on quantum computing (QC), to explore ideas related to how visualization helps in understanding QC, and examine how QC might be useful for visualization with the growth and maturation of both technologies in the future. In a quickly evolving technology landscape, QC is emerging as a promising pathway to overcome the growth limits in classical computing. In some cases, QC platforms offer the potential to vastly outperform the familiar classical computer by solving problems more quickly or that may be intractable on any known classical platform. As further performance gains for classical computing platforms are limited by diminishing Moore’s Law scaling, QC platforms might be viewed as a potential successor to the current field of exascale-class platforms. Importantly, while present-day QC hardware platforms are still limited in scale, the field of quantum computing is robust and rapidly advancing in terms of hardware capabilities, software environments for developing quantum algorithms, and educational programs for training the next generation of scientists and engineers. After a brief introduction to QC concepts, the focus of this article is to explore the interplay between the fields of visualization and QC. First, visualization has played a role in QC by providing the means to show representations of the quantum state of single-qubits in superposition states and multiple-qubits in entangled states. Second, there are a number of ways in which the field of visual data exploration and analysis may potentially benefit from this disruptive new technology though there are challenges going forward.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

Accelerating Lossy and Lossless Compression on Emerging BlueField DPU Architectures

Data compression has become a crucial technique in addressing performance bottlenecks caused by increasing data volumes in High-Performance Computing (HPC), Big Data, and Deep Learning (DL). Despite its potential to boost system performance, recent studies have identified significant challenges with existing compression methods, mainly due to their high computational demands amidst continuously growing data sizes. Concurrently, the advent of Data Processing Units (DPUs), equipped with programmable System-on-Chip (SoC) and specialized compression accelerators, offers a promising opportunity to alter the landscape of data compression. This paper explores the complexities and potential of leveraging NVIDIA BlueField DPUs to accelerate lossy and lossless compression. Towards this, we introduce PEDAL, an innovative library that leverages the hardware capabilities of DPUs to unify and optimize data compression designs. Moreover, we seamlessly co-design PEDAL with the popular MPICH MPI library, demonstrating up to 101x speedup in compression time and 88x decrease in communication latency. Drawing on these achievements, we share our experience with various research communities about accelerating data compression on DPUs in communication-oriented HPC scenarios.

Li, Yuke↗
DOE OSTI2025

Gauge-fixing quantum density operators at scale

We provide a theory, algorithms, and simulations of nonequilibrium quantum systems using a one-dimensional (1D) completely positive (CP), matrix-product (MP) density-operator (𝜌) representation. By generalizing the matrix product state's orthogonality center, to additionally store positive classical mixture correlations, the MP⁢𝜌 factorization naturally emerges. In this setting, we analytically and numerically examine the virtual gauge freedoms associated with the representation of quantum density operators. Based on this perspective, we simplify algorithms in certain limits to speed up the integration of the canonical-form master-equation dynamics. This enables us to quickly evolve under the dynamics of two-body quantum channels without resorting to optimization-based methods. In addition to this technical advance, we also scale up numerical examples and discuss implications for accurately modeling hardware architectures and predicting their performance in the near term. This includes an example of the quantum to classical transition of informationally leaky, i.e., decohering, qubits. In this setting, because of loss from environmental interactions, nonlocal complex coherence correlations are converted into global incoherent classical statistical mixture correlations. Lastly, the representation of both global and local correlations is discussed. We expect this work to have applications in additional nonequilibrium settings, beyond qubit engineering.

Gangapuram, Amit Jamadagni [Oak Ridge National Lab↗
DOE OSTI2023

VTK-m: Visualization for the Exascale Era and Beyond

A recent trend in modern high-performance computing is the increasing use of hybrid architectures, where the vast majority of performance comes from accelerators. Modern accelerators are based on Graphics Processing Units (GPU) that contain many low power cores that in their aggregate provides an extremely high computation rate. Current and future CPU processors are requiring more explicit parallelism as each successive version of the hardware packs in more cores, and technologies like hyperthreading and vector operations require even more parallel processing to leverage each core’s full potential. As an example, the Frontier supercomputer installed at Oak Ridge National Laboratories recently hit a record breaking 1.1 exaflops1 on the LINPACK HPC benchmark [Shoemaker 2022]. The system contains 37632 AMD MI250x GPUs which requires more than half a billion threads to keep the system fully utilized [Khizeran 2022].VTK-m is a toolkit of scientific visualization algorithms for these emerging processor architectures. VTK-m supports the fine-grained concurrency for data analysis and visualization algorithms required to drive extreme scale computing by providing abstract models for data and execution that can be applied to a variety of algorithms across many different processor architectures.

Bolstad, Mark↗
DOE OSTI2022

Quantum criticality using a superconducting quantum processor

Quantum criticality emerges from the collective behavior of many interacting quantum particles, often at the transition between different phases of matter. It is one of the cornerstones of condensed matter physics, which we access on noisy intermediate-scale (NISQ) quantum devices by leveraging a dynamically driven phenomenon. Here we probe the critical properties of the one-dimensional quantum Ising model on a programmable superconducting quantum chip via a Kibble-Zurek process, obtain scaling laws, and estimate critical exponents despite inherent sources of errors on the hardware. In addition, we investigate how the improvement of NISQ computers (more qubits, less noise) will consolidate the computation of those universal physical properties. A one-parameter noise model captures the effect of imperfections and reproduces the experimental data. Its systematic study reveals that the noise, analogously to temperature, induces a new length scale in the system. We introduce and successfully verify modified scaling laws, directly accounting for the noise without any prior knowledge. It makes data analyses for extracting physical properties transparent to noise. By understanding how imperfect quantum hardware modifies the genuine properties of quantum states of matter, we enhance the power of NISQ processors considerably for addressing quantum criticality and potentially other phenomena and algorithms.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2023

Studying light–matter interactions and energy transfer at the nanoscale with a trapped–ion quantum computer

A grand challenge in materials sciences is to control energy transduction, transfer and dissipation at the nanoscale. Meeting this challenge requires progress in nanoscale fabrication and synthesis, but equally importantly, also progress in our understanding of how nanoscale structure influences these phenomena. Although detailed quantum mechanical models exist that capture the structure and physics of materials and molecular species, solving these models to calculate the relevant emergent phenomena, which often occur over vastly different time and energy scales, has so far proven difficult. In this project, we studied how to model energy transfer and light-matter interactions using trapped-ion quantum computers. Our studies focused on emulation of critical processes in natural systems, such as the well-known photosynthetic pigment-protein complexes responsible for capturing and transducing light to electrons. In addition, we implemented proof-of-principle experiments demonstrating that such calculations are possible on trapped-ion quantum computing hardware. These studies and experiments pave the way to investigate energy transport and transduction in a detail not accessible with classical computing technologies. We expect that our studies will allow to extract important guiding principles on how to improve the efficiency of nano-scale light-harvesting and transduction devices.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Fast-forwarding quantum simulation with real-time quantum Krylov subspace algorithms

Quantum subspace diagonalization (QSD) algorithms have emerged as a competitive family of algorithms that avoid many of the optimization pitfalls associated with parameterized quantum circuit algorithms. While the vast majority of the QSD algorithms have focused on solving the eigenpair problem for ground, excited-state, and thermal observable estimation, there has been a lot less work in considering QSD algorithms for the problem of quantum dynamical simulation. In this work, we propose several quantum Krylov fast-forwarding (QKFF) algorithms capable of predicting long-time dynamics well beyond the coherence time of current quantum hardware. Our algorithms use real-time evolved Krylov basis states prepared on the quantum computer and a multi-reference subspace method to ensure convergence towards high-fidelity, long-time dynamics. In particular, we show that the proposed multi-reference methodology provides a systematic way of trading off circuit depth with classical post-processing complexity. Further, we also demonstrate the efficacy of our approach through numerical implementations for several quantum chemistry problems including the calculation of the auto-correlation and dipole moment correlation functions.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

Summer Internship Report: ARA2 Benchmarking

Over the past decade, the RISC-V Instruction Set Architecture (ISA) has emerged as a significant player in both academic and industrial processor design due to its open-source nature, modular extension system, and versatility across domains ranging from microcontrollers to high-performance computing (HPC). One of its most important recent advancements is the RISC-V Vector Extension (RVV), which enables explicit data-level parallelism through vector registers and vectorized instructions. Unlike traditional SIMD (Single Instruction, Multiple Data) architectures that fix vector lengths at design time, RVV uses the concept of VLEN (vector register length) as a hardware-independent parameter and allows software to adapt dynamically to the available vector width. This flexible approach ensures portability across implementations while enabling scalable performance. The ARA2 core is a parameterizable RISC-V vector processor developed at the Integrated Systems Lab at ETH Zürich and the University of Bologna. Designed as a tightly-coupled accelerator to a scalar RISC-V core, ARA2 implements the RVV 1.0 specification and offers tunable architectural parameters such as the number of vector lanes, VLEN, and cache sizes.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2020

Toward Large-Scale Image Segmentation on Summit

Semantic segmentation of images is an important computer vision task that emerges in a variety of application domains such as medical imaging, robotic vision and autonomous vehicles to name a few. While these domain-specific image analysis tasks involve relatively small image sizes (~ 10 2 × 10 2 ), there are many applications that need to train machine learning models on image data with extents that are orders of magnitude larger (~10 4 × 10 4 ). Training deep neural network (DNN) models on large extent images is extremely memory-intensive and often exceeds the memory limitations of a single graphical processing unit, a hardware accelerator of choice for computer vision workloads. Here, an efficient, sample parallel approach to train U-Net models on large extent image data sets is presented. Its advantages and limitations are analyzed and near-linear strong-scaling speedup demonstrated on 256 nodes (1536 GPUs) of the Summit supercomputer. Using a single node of the Summit supercomputer, an early evaluation of a recently released model parallel framework called GPipe is demonstrated to deliver ~ 2X speedup in executing a U-Net model with an order of magnitude larger number of trainable parameters than reported before. Performance bottlenecks for pipelined training of U-Net models are identified and mitigation strategies to improve the speedups are discussed. Together, these results open up the possibility of combining both approaches into a unified scalable pipelined and data parallel algorithm to efficiently train U-Net models with very large receptive fields on data sets of ultra-large extent images.

Seal, Sudip↗
DOE OSTI2024

Dual Channel Dual Staging: Hierarchical and Portable Staging for GPU-Based In-Situ Workflow

In-situ workflows have emerged as an attractive approach for addressing data movement challenges at very large scales. Since GPU-based architectures dominate the HPC landscapes, porting these in-situ workflows, and, specifically, the inter-application data exchange, to GPU-based systems can be challenging. Technologies such as GPUDirect RDMA (GDR), which is typically used for I/O in GPU applications as an optimization that circumvents the CPU overhead, can be leveraged to support bulk data exchanges between GPU applications. However, current GDR design often lacks performance portability across HPC clusters built with different hardware configurations. Furthermore, the local CPU may also be effectively used as an auxiliary communication mechanism to offload data exchanges. In this paper, we present a dual channel dual staging approach for efficient, scalable, and performance-portable inter-application data exchange for in-situ workflows. This approach exploits the data access pattern within in-situ workflows along with the inherent execution asynchrony to accelerate data exchanges and, at the same time, improve performance portability. Specifically, the dual channel dual staging method leverages both the local CPU and the remote data staging server to build a hierarchical joint staging area and uses this staging area to transform blocking inter-application bulk data exchanges into best-effort local data movements between GPU and CPU. The dual channel dual staging is implemented as a portability extension of the Dataspaces-GPU staging framework. We present an experimental evaluation of its performance, portability, and scalability using this implementation on three leadership GPU clusters. The evaluation results demonstrate that the dual channel dual staging method saves up to 75% in data-exchange time compared to host-based, GDR, and alternate portable designs, while maintaining scalability (up to 512 GPUs) and performance portability across the three platforms.

Zhang, Bo [University of Utah]↗
DOE OSTI2024

Securing Digital Energy Infrastructure: Procurement, Contracting, and Supply Chain Risk Management Guidance

Recognizing the scale of this industry challenge, the United States (U.S.) Department of Energy (DOE) Grid Deployment Office (GDO) and Cybersecurity Energy Security & Emergency Response office have launched a multi-year BESS supply chain security initiative to identify consequence-driven approaches to addressing BESS supply chain security and provide resources to support prioritization of supply chain security efforts associated with the procurement of BESS equipment and services. This guide is one element of the supporting resources to be provided and sets forth a framework and guidance for procurement bidding, selection, risk analysis, and agreements stakeholders can implement to mitigate cybersecurity risks across the entirety of battery system component ecosystem, including the interconnected software and hardware required for control and monitoring BESSs.

25 ENERGY STORAGE↗
DOE OSTI2026

Equipment Assessment Guide: A Technical Inspection and Hardening Guide for Devices in Power Grid Operations

This Equipment Assessment Guide, developed by Idaho National Laboratory (INL), provides a comprehensive framework designed to enhance the security of operational technology (OT) devices within power grid operations. The guide outlines essential steps for asset owners to conduct technical inspections and harden vulnerable hardware and firmware components commonly found in embedded systems. It focuses on components frequently targeted by cyber threats, offering valuable identification techniques for locating and recognizing critical components on devices. Additionally, the guide presents recommended secure configurations aimed at minimizing exposure and reinforcing defenses, along with impact analysis that highlights the potential consequences for grid operations if components are compromised. By implementing the recommendations outlined in this guide, asset owners can significantly enhance their cybersecurity posture, reduce the attack surface of field-deployed devices, and improve the resilience of grid services against emerging cyber threats.

42 - ENGINEERING↗
DOE OSTI2023

Findings from Design and Operation of Connected Neighborhoods

Distributed energy resources and load management are an important emerging part of smart grids. Concurrent management of homeowner preferences and utility objectives requires an intelligent negotiation strategy supported by physical infrastructure that learns, optimizes, and controls the system. While there is a wide body of research related to modelling and simulation of distributed resources, relatively little is known about their practical feasibility. One of the first attempts to address this knowledge gap was through a 62-house connected neighborhood in Alabama. This study makes one more step in advancing this knowledge through a 46-townhome demonstration neighborhood located in Atlanta, GA. It reports hardware design, system architecture, and the results from the summer experimental work. The findings are discussed in the context of earlier experience, and analysis is expanded to areas which were not the focus of earlier research.

Tsybina, Eve↗
DOE OSTI2023

Hybrid stochastic synapses enabled by scaled ferroelectric field-effect transistors

Achieving brain-like density and performance in neuromorphic computers necessitates scaling down the size of nanodevices emulating neuro-synaptic functionalities. However, scaling nanodevices results in reduction of programming resolution and emergence of stochastic non-idealities. While prior work has mainly focused on binary transitions, in this work, we leverage the stochastic switching of a three-state ferroelectric field-effect transistor to implement a long-term and short-term two-tier stochastic synaptic memory with a single device. Experimental measurements are performed on a scaled 28 nm high-k metal gate technology-based device to develop a probabilistic model of the hybrid stochastic synapse. In addition to the advantage of ultra-low programming energies afforded by scaling, our hardware–algorithm co-design analysis reveals the efficacy of the two-tier memory in comparison to binary stochastic synapses in on-chip learning tasks—paving the way for algorithms exploiting multi-state devices with probabilistic transitions beyond deterministic ones.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2024

Device Feasibility Analysis of Multi-level FeFETs for Neuromorphic Computing

As an emerging non-volatile memory device technology, Ferroelectric Field-Effect Transistors (FeFETs) can enable low-power, adaptive intelligent system design. However, device dimension and operating voltage dependent reliability issues of scaled FeFETs can ultimately lead to degraded performance in solving machine learning tasks. In this article, detailed experimental characterization of FeFET devices of different dimensions have been carried out to explicitly evaluate the non-ideal behavior in device conductance programming properties like number of programming states, cycle-to-cycle (C2C) variations, device-to-device (D2D) variations, and state retention. A hardware-aware software simulation approach has been adopted to capture the adversarial effects of the non-idealities on recognition accuracy through algorithm-level performance assessment by including them in NeuroSim, a popular neural network hardware simulator, to execute a neural network model considering all other hardware constraints. With the added non-idealities, significant accuracy degradation has been observed compared to the ideal scenarios where D2D variations play the most critical role. Thereafter, feasibility of a variation-aware training method has been evaluated to tackle the accuracy drop.

42 ENGINEERING↗
DOE OSTI2024

Securing Grid-interactive Efficient Buildings (GEB) through Cyber Defense and Resilient System (CYDRES)

The DOE CYDRES project is driven by the urgent need to address critical research gaps in the domain of cyber-physical security of smart buildings, including Grid-interactive Efficient Buildings (GEBs). CYDRES, a real-time advanced building resilient platform, aims to enhance the cyber-attack-immune capabilities of buildings through multi-layered prevention, detection, and adaptation mechanisms. CYDRES consists of five key modules: a multi-layer network analyzer, an Automatic Fault Detection, Diagnosis, and Prognosis (AFDDP) framework, an intelligent mode selector, a cyber-resilient control framework, and a situation awareness platform. The Network Analyzer employs a data-driven framework that includes a protocol state learning tool and a CRF (Conditional Random Field) command validator. In Hardware-In-the-Loop (HIL) testbeds, it achieved 100% detection accuracy with a false alarm rate of 3%, validating its efficacy in identifying selected cyber-attacks. The AFDDP framework leverages pattern matching, PCA (Principal Component Analysis)-based strategies, and a DBN (Dynamic Bayesian Network)-based fault diagnosis approach to pinpoint the causes of physical system abnormalities using Building Automation System (BAS) data. In HIL experiments, the AFDDP module attained a detection accuracy of over 95% with a false alarm rate below 7%. Additionally, the fault detector utilized machine learning (Random Forest) and deep learning (Multi-Layer Perceptron) methods with acoustic sensor data to achieve a 100% fault detection accuracy in Heating, Ventilation, and Air-Conditioning (HVAC) equipment. The Mode Selector offered real-time impact analysis, allowing immediate actions to protect BASs in the face of emerging threats. The cyber-resilient control framework included an adaptive Model Predictive Control (MPC) and a measurement compensator, reducing temperature violations by up to 94% and improving the total demand flexibility by up to 70% in HIL experiments. Such HIL experiments covered a cyber-attack case and a physical fault case, showcasing CYDRES’ efficiency in maintaining operational continuity during threats. The situation awareness platform in Grafana enhanced real-time threat detection and response visualization, augmenting the operational awareness for building operators. CYDRES demonstrated high technical effectiveness in various test scenarios, particularly in HIL environments. The project's phased development approach ensured efficient use of resources, highlighting its practical feasibility and readiness for commercialization. By enhancing the security and resilience of building operations, CYDRES represents a significant advance in mitigating risks associated with cyber-physical systems, thereby enhancing public confidence in the safety of modern building infrastructure. Future directions for the project include expanding testing protocols, refining AFDDP methodologies, exploring more comprehensive resilient control strategies, and testing in real commercial buildings.

42 ENGINEERING↗
DOE OSTI2025

Hybrid classical-quantum communication networks

Over the past several decades, the proliferation of global classical communication networks has transformed various facets of human society. Concurrently, quantum networking has emerged as a dynamic field of research, driven by its potential applications in distributed quantum computing, quantum sensor networks, and secure communications. This prompts a fundamental question: rather than constructing quantum networks from scratch, can we harness the widely available classical fiber-optic infrastructure to establish hybrid quantum–classical networks? This paper aims to provide a comprehensive review of ongoing research endeavors aimed at integrating quantum communication protocols, such as quantum key distribution, into existing lightwave networks. This approach offers the substantial advantage of reducing implementation costs by allowing classical and quantum communication protocols to share optical fibers, communication hardware, and other network control resources—arguably the most pragmatic solution in the near term. In the long run, classical communication will also reap the rewards of innovative quantum communication technologies, such as quantum memories and repeaters. Accordingly, our vision for the future of the Internet is that of heterogeneous communication networks thoughtfully designed for the seamless support of both classical and quantum communications.

Fiber-optic communication↗