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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11
All sourcesNASA NTRSDOE OSTI
NASA NTRS2002

Inadvertently programmed bits in Samsung 128 Mbit flash devices: a flaky investigation

JPL's X2000 avionics design pioneers new territory by specifying a non-volatile memory (NVM) board based on flash memories. The Samsung 128Mb device chosen was found to demonstrate bit errors (mostly program disturbs) and block-erase failures that increase with cycling. Low temperature, certain pseudo- random patterns, and, probably, higher bias increase the observable bit errors. An experiment was conducted to determine the wearout dependence of the bit errors to 100k cycles at cold temperature using flight-lot devices (some pre-irradiated). The results show an exponential growth rate, a wide part-to-part variation, and some annealing behavior.

flash memory program disturb wearout erase fail re↗
NASA NTRS1973

PLZT block data composers operated in differential phase mode

The use of PLZT ceramics with the 7/65/35 composition in block data composer (BDC) input devices for holographic memory systems has previously been described for operation in the strain biased, scattering, and edge effect modes. A new and promising mode of BDC operation is the differential phase mode in which each element of a matrix array BDC acts as a phase modulator. The phase modulation results from a phase difference in the optical path length between the electrically poled and depoled states of the PLZT. It is shown that a PLZT BDC can be used as a matrix-type phase modulator to record and process digital data by the differential phase mode in a holographic recording/processing system with readout contrast ratios of between 10:1 and 15:1. The differential phase mode has the advantages that strain bias is not required and that the thickness and strain variations in the PLZT are cancelled out.

Drake, M. D.↗
NASA NTRS1977

Mask and display program

Program is used to create complex lines, shapes, circles and alpha-numeric characters rapidly and easily, and format them for use on some pattern generation. System is applicable as aid to designers of microelectronics, integrated optics, bubble memories and other devices requiring precise artwork.

Routh, D.↗
NASA NTRS1982

Programable Interface Handles Many Peripherals

Microprocessor-based interface simplifies interconnection of peripheral device with common memory of network of minicomputers. Interface consists of microprocessor, bidirectional port that connects to common memory, bidirectional port that connects to user-selected peripheral, and asynchronous serial communications port. Programable interface is based around 6800 microprocessor. It is assembled from 90 integrated circuits.

Jasinski, M.↗
NASA NTRS1988

Index grating lifetime in photorefractive GaAs

The index grating lifetime in liquid encapsulated Czochralski-grown undoped semi-insulating GaAs was measured using a beam coupling technique. The largest lifetime measure was about 8 s under a read beam intensity of 0.7 mW/sq cm with the grating periodicity being 0.63 microns. The measured value decreases to milliseconds as the read beam intensity and the grating periodicity increase to about 10 mW/sq cm and 4 microns, respectively. This range of grating lifetime in this material is adequate for its use in real-time spatial light modulators, reconfigurable beam steering devices, and dynamic memory elements, for optical computing. In addition, the results suggest that the lifetime is sensitive to residual imperfections in the crystal.

Cheng, Li-Jen↗
NASA NTRS1989

Read disturb errors in a CMOS static RAM chip

Results are reported from an extensive investigation into pattern-sensitive soft errors (read disturb errors) in the TCC244 CMOS static RAM chip. The TCC244, also known as the SA2838, is a radiation-hard single-event-upset-resistant 4 x 256 memory chip. This device is being used by the Jet Propulsion Laboratory in the Galileo and Magellan spacecraft, which will have encounters with Jupiter and Venus, respectively. Two aspects of the part's design are shown to result in the occurrence of read disturb errors: the transparence of the signal path from the address pins to the array of cells, and the large resistance in the Vdd and Vss lines of the cells in the center of the array. Probe measurements taken during a read disturb failure illustrate how address skews and the data pattern in the chip combine to produce a bit flip. A capacitive charge pump formed by the individual cell capacitances and the resistance in the supply lines pumps down both the internal cell voltage and the local supply voltage until a bit flip occurs.

Wood, Steven H.↗
NASA NTRS1995

Rotary actuator

Rotary actuators and other mechanical devices incorporating shape memory alloys are provided herein. Shape memory alloys are a group of metals which when deformed at temperatures below their martensite temperatures, resume the shapes which they had prior to the deformation if they are heated to temperatures above their austensite temperatures. Actuators in which shape memory alloys are employed include bias spring types, in which springs deform the shape memory alloy (SMA), and differential actuators, which use two SMA members mechanically connected in series. Another type uses concentric cylindrical members. One member is in the form of a sleeve surrounding a cylinder, both being constructed of shape memory alloys. Herein two capstans are mounted on a shaft which is supported in a framework. Each capstan is capable of rotating the shaft. Shape memory wire, as two separate lengths of wire, is wrapped around each capstan to form a winding around that capstan. The winding on one capstan is so wrapped that the wire is in a prestretched state. The winding on the other capstan is so wrapped that the wire is in a taut, but not a prestretched, state. Heating one performs work in one direction, thus deforming the other one. When the other SMA is heated the action is reversed.

Brudnicki, Myron↗
NASA NTRS2002

Evaluation of Data Retention and Imprint Characteristics of FRAMs Under Environmental Stresses for NASA Applications

A major reliability issue for all advanced nonvolatile memory (NVM) technology devices including FRAMs is the data retention characteristics over extended period of time, under environmental stresses and exposure to total ionizing dose (TID) radiation effects. For this testing, 256 Kb FRAMs in 28-pin plastic DIPS, rated for industrial grade temperature range of -40 C to +85 C, were procured. These are two-transistor, two-capacitor (2T-2C) design FRAMs. In addition to data retention characteristics, the parts were also evaluated for imprint failures, which are defined as the failure of cells to change from a "preferred" state, where it has been for a significant period of time to an opposite state (e.g., from 1 to 0, or 0 to 1). These 256 K FRAMs were subjected to scanning acoustic microscopy (C-SAM); 1,000 temperature cycles from -65 C to +150 C; high temperature aging at 150 C, 175 C, and 200 C for 1,000 hours; highly accelerated stress test (HAST) for 500 hours; 1,000 hours of operational life test at 125 C; and total ionizing dose radiation testing. As a preconditioning, 10 K read/write cycles were performed on all devices. Interim electrical measurements were performed throughout this characterization, including special imprint testing and final electrical testing. Some failures were observed during high temperature aging test at 200 C, during HAST testing, and during 1,000 hours of operational life at 125 C. The parts passed 10 Krad exposure, but began showing power supply current increases during the dose increment from 10 Krad to 30 Krad, and at 40 Krad severe data retention and parametric failures were observed. Failures from various environmental group testing are currently being analyzed.

Sharma, Asbok K.↗
NASA NTRS2004

The Dynamics of the Atmospheric Radiation Environment at Aviation Altitudes

Single Event Effects vulnerability of on-board computers that regulate the: navigational, flight control, communication, and life support systems has become an issue in advanced modern aircraft, especially those that may be equipped with new technology devices in terabit memory banks (low voltage, nanometer feature size, gigabit integration). To address this concern, radiation spectrometers need to fly continually on a multitude of carriers over long periods of time so as to accumulate sufficient information that will broaden our understanding of the very dynamic and complex nature of the atmospheric radiation environment regarding: composition, spectral distribution, intensity, temporal variation, and spatial variation.

Stassinopoulos, Epaminondas G.↗
NASA NTRS2007

Structural Bus and Release Mechanisms on the ST5 Satellites: Summary and Status

The Space Technology 5 Mechanical System met the challenge of packaging a fully functional science and technology satellite system with its Deployer mechanism into a compact 0.07cu m volume. Three 25 kg satellites were orbited in constellation in March, 2006. The ST5 mechanical system is composed of 1) The Structural Bus; 2) Magnetometer Instrument Boom 3) Spacecraft Deployer Release Mechanism This system includes a highly integrated electronics enclosure as a multifunctional structure; a lightweight, magnetically clean Magnetometer Boom; the first use of Nitinol Shape-Memory Alloy trigger devices for deploying multiple spacecraft; an innovative compliant mount for the umbilical connector and a Deployer mechanism that imparts both separation velocity and mission spin rate to three constellation flying satellites These elements employed cutting-edge design and analysis tools, state-of-the-art testing facilities and proven engineering techniques to meet stringent performance criteria, enabling the mission s success.

Rossoni, Peter↗
NASA NTRS2011

Nanomaterials for Electronics and Optoelectronics

Nanomaterials such as carbon nanotubes(CNTs), graphene, and inorganic nanowires(INWs) have shown interesting electronic, mechanical, optical, thermal, and other properties and therefore have been pursued for a variety of applications by the nanotechnology community ranging from electronics to nanocomposites. While the first two are carbon-based materials, the INWs in the literature include silicon, germanium, III-V, II-VI, a variety of oxides, nitrides, antimonides and others. In this talk, first an overview of growth of these three classes of materials by CVD and PECVD will be presented along with results from characterization. Then applications in development of chemical sensors, biosensors, energy storage devices and novel memory architectures will be discussed.

Koehne, Jessica E.↗
NASA NTRS2018

Lessons Learned in the Flight Qualification of the S-NPP and NOAA-20 Solar Array Mechanisms

Deployable solar arrays are the energy source used on almost all Earth orbiting spacecraft and their release and deployment are mission-critical; fully testing them on the ground is a challenging endeavor. The 8 meter long deployable arrays flown on two sequential NASA weather satellites were each comprised of three rigid panels almost 2 meters wide. These large panels were deployed by hinges comprised of stacked constant force springs, eddy current dampers, and were restrained through launch by a set of four releasable hold-downs using shape memory alloy release devices. The ground qualification testing of such unwieldy deployable solar arrays, whose design was optimized for orbital operations, proved to be quite challenging and provides numerous lessons learned. A paperwork review and follow-up inspection after hardware storage determined that there were negative torque margins and missing lubricant, this paper will explain how these unexpected issues were overcome. The paper will also provide details on how the hinge subassemblies, the fully-assembled array, and mechanical ground support equipment were subsequently improved and qualified for a follow-on flight with considerably less difficulty. The solar arrays built by Ball Aerospace Corp. for the Suomi National Polar Partnership (S-NPP) satellite and the Joint Polar Satellite System (JPSS-1) satellite (now NOAA-20) were both successfully deployed on-obit and are performing well.

Helfrich, Daniel↗
NASA NTRS2018

Lessons Learned in the Flight Qualification of the S-NPP and NOAA-20 Solar Array Mechanisms

Deployable solar arrays are the energy source used on almost all Earth orbiting spacecraft and their release and deployment are mission-critical; fully testing them on the ground is a challenging endeavor. The 8 meter long deployable arrays flown on two sequential NASA weather satellites were each comprised of three rigid panels almost 2 meters wide. These large panels were deployed by hinges comprised of stacked constant force springs, eddy current dampers, and were restrained through launch by a set of four releasable hold-downs using shape memory alloy release devices. The ground qualification testing of such unwieldy deployable solar arrays, whose design was optimized for orbital operations, proved to be quite challenging and provides numerous lessons learned. A paperwork review and follow-up inspection after hardware storage determined that there were negative torque margins and missing lubricant, this paper will explain how these unexpected issues were overcome. The paper will also provide details on how the hinge subassemblies, the fully-assembled array, and mechanical ground support equipment were subsequently improved and qualified for a follow-on flight with considerably less difficulty. The solar arrays built by Ball Aerospace Corp. for the Suomi National Polar Partnership (SNPP) satellite and the Joint Polar Satellite System (JPSS-1) satellite (now NOAA-20) were both successfully deployed on-obit and are performing well.

Sexton, Adam↗
NASA NTRS1972

Design, processing, and testing of lsi arrays for space station

The design of a MOS 256-bit Random Access Memory (RAM) is discussed. Technological achievements comprise computer simulations that accurately predict performance; aluminum-gate COS/MOS devices including a 256-bit RAM with current sensing; and a silicon-gate process that is being used in the construction of a 256-bit RAM with voltage sensing. The Si-gate process increases speed by reducing the overlap capacitance between gate and source-drain, thus reducing the crossover capacitance and allowing shorter interconnections. The design of a Si-gate RAM, which is pin-for-pin compatible with an RCA bulk silicon COS/MOS memory (type TA 5974), is discussed in full. The Integrated Circuit Tester (ICT) is limited to dc evaluation, but the diagnostics and data collecting are under computer control. The Silicon-on-Sapphire Memory Evaluator (SOS-ME, previously called SOS Memory Exerciser) measures power supply drain and performs a minimum number of tests to establish operation of the memory devices. The Macrodata MD-100 is a microprogrammable tester which has capabilities of extensive testing at speeds up to 5 MHz. Beam-lead technology was successfully integrated with SOS technology to make a simple device with beam leads. This device and the scribing are discussed.

Lile, W. R.↗
NASA NTRS1970

Improved solid state electron-charge-storage device

Storage device is applicable in memory systems and in high-resolution arrays for light-responsive image sensing. The device offers high yield in multiple arrays and allows charge release with light striking only the edge of a metal electrode.

Kuper, A. B.↗
NASA NTRS1991

Shape-memory alloy micro-actuator

A method of producing an integral piece of thermo-sensitive material, which is responsive to a shift in temperature from below to above a phase transformation temperature range to alter the material's condition to a shape-memory condition and move from one position to another. The method is characterized by depositing a thin film of shape-memory material, such as Nickel titanium (Ni-Ti) onto a substrate by vacuum deposition process such that the alloy exhibits an amorphous non-crystalline structure. The coated substrate is then annealed in a vacuum or in the presence of an inert atmosphere at a selected temperature, time and cool down rate to produce an ordered, partially disordered or fully disordered BCC structure such that the alloy undergoes thermoelastic, martinsetic phase transformation in response to alteration in temperature to pass from a martinsetic phase when at a temperature below a phase transformation range and capable of a high level of recoverable strain to a parent austenitic phase in a memory shape when at a temperature above the phase transformation range. Also disclosed are actuator devices employing shape-memory material actuators that deform from a set shape toward an original shape when subjected to a critical temperature level after having been initially deformed from the original shape into the set shape while at a lower temperature. The actuators are mechanically coupled to one or more movable elements such that the temperature-induce deformation of the actuators exerts a force or generates a motion of the mechanical element(s).

Busch, John D.↗
NASA NTRS2013

FY12 End of Year Report for NEPP DDR2 Reliability

This document reports the status of the NASA Electronic Parts and Packaging (NEPP) Double Data Rate 2 (DDR2) Reliability effort for FY2012. The task expanded the focus of evaluating reliability effects targeted for device examination. FY11 work highlighted the need to test many more parts and to examine more operating conditions, in order to provide useful recommendations for NASA users of these devices. This year's efforts focused on development of test capabilities, particularly focusing on those that can be used to determine overall lot quality and identify outlier devices, and test methods that can be employed on components for flight use. Flight acceptance of components potentially includes considerable time for up-screening (though this time may not currently be used for much reliability testing). Manufacturers are much more knowledgeable about the relevant reliability mechanisms for each of their devices. We are not in a position to know what the appropriate reliability tests are for any given device, so although reliability testing could be focused for a given device, we are forced to perform a large campaign of reliability tests to identify devices with degraded reliability. With the available up-screening time for NASA parts, it is possible to run many device performance studies. This includes verification of basic datasheet characteristics. Furthermore, it is possible to perform significant pattern sensitivity studies. By doing these studies we can establish higher reliability of flight components. In order to develop these approaches, it is necessary to develop test capability that can identify reliability outliers. To do this we must test many devices to ensure outliers are in the sample, and we must develop characterization capability to measure many different parameters. For FY12 we increased capability for reliability characterization and sample size. We increased sample size this year by moving from loose devices to dual inline memory modules (DIMMs) with an approximate reduction of 20 to 50 times in terms of per device under test (DUT) cost. By increasing sample size we have improved our ability to characterize devices that may be considered reliability outliers. This report provides an update on the effort to improve DDR2 testing capability. Although focused on DDR2, the methods being used can be extended to DDR and DDR3 with relative ease.

Guertin, Steven M.↗
NASA NTRS1990

Development of shape memory metal as the actuator of a fail safe mechanism

A small, compact, lightweight device was developed using shape memory alloy (SMA) in wire form to actuate a pin-puller that decouples the flanges of two shafts. When the SMA is heated it contracts producing a useful force and stroke. As it cools, it can be reset (elongated in this case) by applying a relatively small force. Resistive heating is accomplished by running a current through the SMA wire for a controlled length of time. The electronics to drive the device are not elaborate or complicated, consisting of a timed current source. The total available contraction is 3 percent of the length of the wire. This device, the engineering properties of the SMA, and the tests performed to verify the design concept are described.

Ford, V. G.↗