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Results for “P-N JUNCTION”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11
All sourcesNASA NTRSDOE OSTI
NASA NTRS1978

Semiconductor heterostructure

A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

Hovel, Harold John↗
NASA NTRS1979

Semiconductor structure

A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

Hovel, Harold J.↗
NASA NTRS1994

Porous silicon carbide (SiC) semiconductor device

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Shor, Joseph S.↗
NASA NTRS1991

CCD imaging sensor with flashed backside metal film

A backside illuminated CCD imaging sensor for reading out image charges from wells of the array of pixels is significantly improved for blue, UV, far UV and low energy x-ray wavelengths (1-5000.ANG.) by so overthinning the backside as to place the depletion edge at the surface and depositing a thin transparent metal film of about 10.ANG. on a native-quality oxide film of less than about 30.ANG. grown on the thinned backside. The metal is selected to have a higher work function than that of the semiconductor to so bend the energy bands (at the interface of the semiconductor material and the oxide film) as to eliminate wells that would otherwise trap minority carriers. A bias voltage may be applied to extend the frontside depletion edge to the interface of the semiconductor material with the oxide film in the event there is not sufficient thinning. This metal film (flash gate), which improves and stabilizes the quantum efficiency of a CCD imaging sensor, will also improve the QE of any p-n junction photodetector.

Janesick, James R.↗
NASA NTRS1995

A theoretical analysis of steady-state photocurrents in simple silicon diodes.

A theoretical analysis solves for the steady-state photocurrents produced by a given photogeneration rate function with negligible recombination in simple silicon diodes, consisting of a uniformly doped quasi-neutral region (called "substrate" below) between a p-n junction depletion region (DR) and an ohmic contact (electrode). Special attention is given to conditions that produce "funneling" (a term used by the single-event-effects community) under steady-state conditions. Funneling occurs when carriers are generated so fast that the DR becomes flooded and partially or completely collapses. Some or nearly all of the applied voltage plus built-in potential normally across the DR is now across the substrate. This substrate voltage drop affects substrate currents. The steady-state problem can provide some qualitative insights into the more difficult transient problem. Chapter 6 discusses some similarities between the steady-state and transient problems...

Edmonds, Larry↗
NASA NTRS1965

GaAs-Si photon-activated switch.

Light activated low level switch consisting of electroluminescent GaAs p-n diode and double emitter silicon transistor

SWITCHING ELEMENT↗
NASA NTRS1984

Electron-beam induced current characterization of back-surface field solar cells using a chopped scanning electron microscope beam

A chopped electron beam induced current (EBIC) technique for the chacterization of back-surface field (BSF) solar cells is presented. It is shown that the effective recombination velocity of the low-high junction forming the back-surface field of BSF cells, in addition to the diffusion length and the surface recombination velocity of the surface perpendicular to both the p-n and low-high junctions, can be determined from the data provided by a single EBIC scan. The method for doing so is described and illustrated. Certain experimental considerations taken to enhance the quality of the EBIC data are also discussed.

Luke, K. L.↗
NASA NTRS1972

Silicon solar cell development and radiation effects study for low temperature and low illumination intensity operation, volume 2

The results are presented of a study to determine the effect of in-situ proton irradiation upon low temperature, low intensity performance of several cell types. The cell types were selected in an attempt to distinguish variations in temperature-dependent radiation resistance which could be attributed to the n-p or p-n structure, diffused or implanted junctions, crucible grown or float-zone type base material, and high or low base resistivity. The results indicate that while expected variations of performance occur at room temperature, all cell types degrade more or less similarly at lower temperatures with normalized degradation becoming increasingly rapid as temperature is reduced. Recommendations for an optimized cell for Jupiter probe use are included along with a definition of the testing required on these cells to insure good performance characteristics.

Kirkpatrick, A. R.↗
NASA NTRS1985

Development of design criteria and qualification tests for bypass diodes in photovoltaic applications

Design criteria have been developed for bypass diodes in p-n and Schottky barrier in photovoltaic applications. A test method for assessing conformity to the design criteria is described. Junction temperatures are defined in terms of expected worst-case field conditions, including ambient temperature and solar irradiance on the photovoltaic module. The rating criteria address the maximum allowable current and heat-sink characteristics of diodes mounted inside or outside the photovoltaic module. The method establishes worst-case module-to-diode thermal interfaces and may be adapted for laboratory or field-site experiments. A list of the design criteria is given.

Otth, D. H.↗
NASA NTRS1998

Perimeter Governed Minority Carrier Lifetimes in 4H-SiC p(+)-n Diodes Measured by Reverse Recovery Switching Transient Analysis

Minority carrier lifetimes in epitaxial 4H-SiC p(+)-n junction diodes were measured via an analysis of reverse recovery switching characteristics. Behavior of reverse recovery storage time (t(s)) as a function of initial ON-state forward current (I(F)) and OFF-state reverse current (I(R)) followed well-documented trends which have been observed for decades in silicon p-n rectifiers. Average minority carrier (hole) lifetimes (tau(p)) calculated from plots of t(s) vs I(R)/I(F) strongly decreased with decreasing device area. Bulk and perimeter components of average hole lifetimes were separated by plotting 1/tau(p) as a function of device perimeter-to- area ratio (P/A). This plot reveals that perimeter recombination is dominant in these devices, whose areas are all less than 1 sq mm. The bulk minority carrier (hole) lifetime extracted from the 1/tau(p) vs P/A plot is approximately 0.7 micro-s, well above the 60 ns to 300 ns average iit'eptimes obtained when perimeter recombination effects are ignored in the analysis. Given the fact that there has been little previous investigation of bipolar diode and transistor performance as a function of perimeter-to-area ratio, this work raises the possibility that perimeter recombination may be partly responsible for poor effective minority carrier lifetimes and limited performance obtained in many previous SiC bipolar junction devices.

Neudeck, Philip G.↗