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At least 199 records · Page 11

Microprocessor control for standardized power control systems

The use of microcomputers in space-oriented power systems as a replacement for existing inflexible analog type controllers has been proposed. This study examines multiprocessor systems, various modularity concepts and presents a conceptualized power system incorporating a multiprocessor controller as well as preliminary results from a breadboard model of the proposed system.

Green, D. G.

A versatile microprocessor-controlled hybrid receiver

A hybrid receiver has been designed for the Galileo Project. The receiver, located on the Galileo Orbiter, will autonomously acquire and track signals from the first atmospheric probe of Jupiter as well as demodulate, bit-synchronize, and buffer the telemetry data. The receiver has a conventional RF and LF front end but performs multiple functions digitally under firmware control. It will be a self-acquiring receiver that operates under a large frequency uncertainty; it can accommodate different modulation types, bit rates, and other parameter changes via reprogramming. A breadboard receiver and test set demonstrate a preliminary version of the sequential detection process and verify the hypothesis that a fading channel does not reduce the probability of detection.

Grant, T. L.

Simulation of distributed microprocessor-based flight control systems

The aim of the present paper is to demonstrate, within the framework of a digital flight control system, the method of simulating the information exchange between a microcomputer and a supervisory computer, and between microcomputers working on separate control tasks. A gradient technique is described that considers the trade-off between the objectives of the control system and the information exchange requirements.

Lee, P. S.

Microprocessor-controlled data synchronizer

Versatile receiver processes data at variety of rates and code formats. Functions performed are: bit detection, NRZ-L conversion, frame synchronization (with programmable word length), bit-sync acquisition and tracking, error-curve normalization, lock detection, half-bit-ambiguity resolution, and data-rate tracking.

Houston, S. W.

Microprocessor control for phase-lock receiver

Subsystem facilities flexible data acquisition by combining hardware and software processing. Device controls complex signal acquisition sequence and assists in precise phase locking to received signal. Key features include software system and code-generator initialization routines, executive routine, utility subroutines, control sequence routines for each receiver acquisition state, control-command decoding routine, and look-up tables for code-generator configuration versus code-set number. Steps can be added to extend input signal dynamic range.

Carson, L. M.

Microprocessor-based detector for PSK commands

Command detector unit operates over wide range of data rates and signal levels in space environment. It consists of signal conditioning, read-only memory, random-access memory, and digital processor. Entire unit fits on single multilayer printed-wiring board.

Durden, J.

Microprocessor systems for industrial process control

Six computers operate synchronously and are interconnected by three independent data buses. Processors control one subsystem. Some can control buses to transfer data at 1 megabit per second. Every 2.5 msec each processor examines list of things to do during next interval. This spacecraft control system could be adapted for controlling complex industrial processes.

Lesh, F. H.

An experimental distributed microprocessor implementation with a shared memory communications and control medium

The distributed processing concept is defined in terms of control primitives, variables, and structures and their use in performing a decomposed discrete Fourier transform (DET) application function. The design assumes interprocessor communications to be anonymous. In this scheme, all processors can access an entire common database by employing control primitives. Access to selected areas within the common database is random, enforced by a hardware lock, and determined by task and subtask pointers. This enables the number of processors to be varied in the configuration without any modifications to the control structure. Decompositional elements of the DFT application function in terms of tasks and subtasks are also described. The experimental hardware configuration consists of IMSAI 8080 chassis which are independent, 8 bit microcomputer units. These chassis are linked together to form a multiple processing system by means of a shared memory facility. This facility consists of hardware which provides a bus structure to enable up to six microcomputers to be interconnected. It provides polling and arbitration logic so that only one processor has access to shared memory at any one time.

Mejzak, R. S.

A Fourier transform with speed improvements for microprocessor applications

A fast Fourier transform algorithm for the RCA 1802microprocessor was developed for spacecraft instrument applications. The computations were tailored for the restrictions an eight bit machine imposes. The algorithm incorporates some aspects of Walsh function sequency to improve operational speed. This method uses a register to add a value proportional to the period of the band being processed before each computation is to be considered. If the result overflows into the DF register, the data sample is used in computation; otherwise computation is skipped. This operation is repeated for each of the 64 data samples. This technique is used for both sine and cosine portions of the computation. The processing uses eight bit data, but because of the many computations that can increase the size of the coefficient, floating point form is used. A method to reduce the alias problem in the lower bands is also described.

Lokerson, D. C.

Bi-directional communication interface for microprocessor-to-system/370

The design and operation of a bi-directional communication interface between a microcomputer and the IBM System/370 is documented. The hardware unit interconnects a modem to interface to the S/370, the microcomputer with an EIA I/O port, and a terminal for sending and receiving data from either the microcomputer or the S/370. Also described is the software necessary for the two-way interface. This interface is designed so that no modifications need to be made to the terminal, modem, or microcomputer.

Fischer, J. P.

Numerical algorithms for finite element computations on arrays of microprocessors

The development of a multicolored successive over relaxation (SOR) program for the finite element machine is discussed. The multicolored SOR method uses a generalization of the classical Red/Black grid point ordering for the SOR method. These multicolored orderings have the advantage of allowing the SOR method to be implemented as a Jacobi method, which is ideal for arrays of processors, but still enjoy the greater rate of convergence of the SOR method. The program solves a general second order self adjoint elliptic problem on a square region with Dirichlet boundary conditions, discretized by quadratic elements on triangular regions. For this general problem and discretization, six colors are necessary for the multicolored method to operate efficiently. The specific problem that was solved using the six color program was Poisson's equation; for Poisson's equation, three colors are necessary but six may be used. In general, the number of colors needed is a function of the differential equation, the region and boundary conditions, and the particular finite element used for the discretization.

Ortega, J. M.

Prototype microprocessor controller

A microcomputer controller for STDN antennas was developed. The microcomputer technology reduces the system's physical size by the implementation in firmware of functions. The reduction in the number of components increases system reliability and similar benefit is derived when a graphic video display is substituted for several control and indicator panels. A substantial reduction in the number of cables, connectors, and mechanical switches is achieved. The microcomputer based system is programmed to perform calibration and diagnostics, to update the satellite orbital vector, and to communicate with other network systems. The design is applicable to antennas and lasers.

Zarur, J.

Application of microprocessors in an upper atmosphere instrument package

A servo-driven magnetometer table measuring offset from magnetic north has been developed by NASA to calculate payload azimuth required to point at a celestial target. Used as an aid to the study of gamma-ray phenomena, the high-altitude balloon-borne instrument determines a geocentric reference system, and calculates a set of pointing directions with respect to the system. Principal components include the magnetometer, stepping motor, microcomputer, and gray code shaft encoder. The single-chip microcomputer is used to control the orientation of the system, and consists of a central processing unit, program memory, data memory and input/output ports. Principal advantages include a low power requirement, consuming 6 watts, as compared to 30 watts consumed by the previous system.

Lim, T. S.

A prototype interface unit for microprocessor based Loran-C receiver

An inexpensive data/command entry and CRT display system capable of alphanumeric and graphics moe operation and designed to operate in place of a separate ASCII terminal, is documented. The software to interface this unit to the 6502-based Loran C receiver is also described. The system simplifies receiver operations to a level typical of current avionics systems.

Novacki, S. M., III

Bi-directional communication interface for microprocessor-to-system/370

The design and operation of a bi-directional communication interface between a microcomputer and the IBM System/370 is documented. The hardware unit inter-connects a modem to interface to the S/370, the microcomputer with an EIA I/O port, and a terminal for sending and receiving data from either the microcomputer of the S/370. The software necessary for the two-way interface is also described. This interface was designed so that no modifications need to be made to the terminal, modem or microcomputer.

Fischer, J. P.

A prototype interface unit for microprocessor-based Loran-C receiver

A data/command entry ASCII keypad with a CRT display capable of alphanumeric and graphics mode operation which provides specialized data entry and display for the LORAN-C receiver/processor was developed. This unit will replace conventional communication terminal to simplify receiver operations to a level typical of current avionics systems.

Novacki, S. M., III