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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11
All sourcesNASA NTRSDOE OSTI
NASA NTRS1980

Laser diode with thermal conducting, current confining film

A laser diode formed of a rectangular parallelopiped body of single crystalline semiconductor material includes regions of opposite conductivity type indium phosphide extending to opposite surfaces of the body. Within the body is a PN junction at which light can be generated. A stripe of a conductive material is on the surface of the body to which the P type region extends and forms an ohmic contact with the P type region. The stripe is spaced from the side surfaces of the body and extends to the end surfaces of the body. A film of germanium is on the portions of the surface of the P type region which is not covered by the conductive stripe. The germanium film serves to conduct heat from the body and forms a blocking junction with the P type region so as to confine the current through the body, across the light generating PN junction, away from the side surfaces of the body.

Hawrylo, Frank Z.↗
NASA NTRS1995

NASA Tech Briefs, November 1995

The contents include: 1) Mission Accomplished; 2) Resource Report: Marshall Space Flight Center; 3) NASA 1995 Software of the Year Award; 4) Microbolometers Based on Epitaxial YBa2Cu3O(sub 7-x) Thin Films; 5) Garnet Random-Access Memory; 6) Fabrication of SNS Weak Links on SOS Substrates; 7) High-Voltage MOSFET Switching Circuit; 8) Asymmetric Switching for a PWM H-Bridge Power Circuit; 9) Better Ohmic Contacts for InP Semiconductor Devices; 10) Low-Bandgap Thermovoltaic Materials and Devices; 11) Digital Frequency-Differencing Circuit; 12) Imaging Magnetometer; 13) Computer-Assisted Monitoring of a Complex System; 14) Buffered Telemetry Demodulator; 15) Compact Multifunction Inspection Head; 16) Optical Detection of Fractures in Ceramic Diaphragms; 17) Eddy-Current Detection of Cracks in Reinforced Carbon/Carbon; 18) Apparent Thermal Conductivity of Multilayer Insulation; 19) Optimizing Misch-Metal Compositions in Metal Hydride Anodes; 20) Device for Sampling Surface Contamination; 21) Probabilistic Failure Assessment for Fatigue; 22) Probabilistic Fatigue and Flaw-Propagation Analysis; 23) Windows Program for Driving the TDU-850 Printer; 24) Subband/Transform MATLAB Functions for Processing Images; 25) Computing Equilibrium Chemical Compositions; 26) Program Processes Thermocouple Readings; 27) ICAN-Second-Generation Integrated Composite Analyzer; 28) Integrated Composite Analyzer with Damping Capabilities; 29) Computing Efficiency of Transfer of Microwave Power; 30) Program Calculates Power Demands of Electronic Designs; 31) Cost-Estimation Program; 32) Program Estimates Areas Required by Electronic Designs; 33) Program to Balance Mapped Turbopump Assemblies; 34) BiblioTech; 35) Controlling Mirror Tilt With a Bimorph Actuator; 36) Burst-Disk Device Simulates Effect of Pyrotechnic Device; 37) Bearing-Mounting Concept Accommodates Thermal Expansion; 38) Parallel-Plate Acoustic Absorbers for Hot Environments; 39) Adjustable-Length Strut Withstands Large Cyclic Loads; 40) Tool Indicates Contact Angles in Bearing Raceways; 41) Gravity Slides With Magnetic Braking; 42) High-Torque, Lightweight, Pneumatically Driven Wrench for Small Spaces; 43) Device for Testing Compatibility of an O-Ring; 44) Magnetic Heat Pump Containing Flow Diverters; 45) Variable-Tilt Helicopter Rotor Mast; 46) "Beach-Ball" Robotic Rovers; 47) Apparatus Would Measure Temperatures of Ball Bearings; 48) Flexible Borescope for Inspecting Ducts; 49) Texturing Copper To Reduce Secondary Emission of Electrons; 50) Automated Laser Cutting in Three Dimensions; 51) Algorithm Helps Monitor Engine Operation; 52) Flexible Revision of Data-Processing Communications; 53) Software for Managing the Use of Land; 54) Thermal Strap Increases Cryocooling Efficiency; 55) Reversible Nut With Engagement Indication; 56) Control Algorithms for Kinematically Redundant Manipulators; 57) Computed Hydrogen-Flow Splits in a Rocket Engine; 58) Pressure and Thermal Modeling of Rocket Launches; 59) Field of View of a Spacecraft Antenna: Analysis and Software; 60) Digital Controller for Laser-Beam-Steering Subsystem; 61) More About Beam-Steering Subsystem for Laser Communication; 62) Digital Controller for Laser-Beam-Steering Subsystem: Part 2; 63) Interface Circuit Board for Space-Shuttle Communications; 64) Automated Planning of Spacecraft Telecommunications; 65) Artifacts of Spectral Analysis of Instrument Readings; 66) Neural-Network Controller for Vibration Suppression; 67) Adaptive Finite-Element Computation in Fracture Mechanics; 68) Attitude Control for the Cassini Spacecraft; 69) Analytical Model for Fluid Dynamics in a Microgravity Environment; 70) Study of Rocket-Engine Joints Bonded by NVCU/NARloy-Z; 71) Improved Silicon Nitride for Advanced Heat Engines; 72) Parameters for Welding Aluminum/Lithium Alloys; 73) Lightweight Composite Intertank Structure; 74) Foil Patches Seal Small Vacuum Leaks; 75) Data Base on Cables and Connectors; 76) Effect of Clock Mode on Radiation Hardnessf an ADC; and 77) Fault-Tolerant Control for a Robotic Inspection System.

Source record↗
NASA NTRS2005

NASA Tech Briefs, November 2005

Topics covered include: Laser System for Precise, Unambiguous Range Measurements; Flexible Cryogenic Temperature and Liquid-Level Probes; Precision Cryogenic Dilatometer; Stroboscopic Interferometer for Measuring Mirror Vibrations; Some Improvements in H-PDLCs; Multiple-Bit Differential Detection of OQPSK; Absolute Position Encoders With Vertical Image Binning; Flexible, Carbon-Based Ohmic Contacts for Organic Transistors; GaAs QWIP Array Containing More Than a Million Pixels; AutoChem; Virtual Machine Language; Two-Dimensional Ffowcs Williams/Hawkings Equation Solver; Full Multigrid Flow Solver; Doclet To Synthesize UML; Computing Thermal Effects of Cavitation in Cryogenic Liquids; GUI for Computational Simulation of a Propellant Mixer; Control Program for an Optical-Calibration Robot; SQL-RAMS; Distributing Data from Desktop to Hand-Held Computers; Best-Fit Conic Approximation of Spacecraft Trajectory; Improved Charge-Transfer Fluorescent Dyes; Stability-Augmentation Devices for Miniature Aircraft; Tool Measures Depths of Defects on a Case Tang Joint; Two Heat-Transfer Improvements for Gas Liquefiers; Controlling Force and Depth in Friction Stir Welding; Spill-Resistant Alkali-Metal-Vapor Dispenser; A Methodology for Quantifying Certain Design Requirements During the Design Phase; Measuring Two Key Parameters of H3 Color Centers in Diamond; Improved Compression of Wavelet-Transformed Images; NASA Interactive Forms Type Interface - NIFTI; Predicting Numbers of Problems in Development of Software; Hot-Electron Photon Counters for Detecting Terahertz Photons; Magnetic Variations Associated With Solar Flares; and Artificial Intelligence for Controlling Robotic Aircraft.

Source record↗
NASA NTRS2012

Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Ray, William Johnstone↗
NASA NTRS2011

Metallization for Yb14MnSb11-Based Thermoelectric Materials

Thermoelectric materials provide a means for converting heat into electrical power using a fully solid-state device. Power-generating devices (which include individual couples as well as multicouple modules) require the use of ntype and p-type thermoelectric materials, typically comprising highly doped narrow band-gap semiconductors which are connected to a heat collector and electrodes. To achieve greater device efficiency and greater specific power will require using new thermoelectric materials, in more complex combinations. One such material is the p-type compound semiconductor Yb14MnSb11 (YMS), which has been demonstrated to have one of the highest ZT values at 1,000 C, the desired operational temperature of many space-based radioisotope thermoelectric generators (RTGs). Despite the favorable attributes of the bulk YMS material, it must ultimately be incorporated into a power-generating device using a suitable joining technology. Typically, processes such as diffusion bonding and/or brazing are used to join thermoelectric materials to the heat collector and electrodes, with the goal of providing a stable, ohmic contact with high thermal conductivity at the required operating temperature. Since YMS is an inorganic compound featuring chemical bonds with a mixture of covalent and ionic character, simple metallurgical diffusion bonding is difficult to implement. Furthermore, the Sb within YMS readily reacts with most metals to form antimonide compounds with a wide range of stoichiometries. Although choosing metals that react to form high-melting-point antimonides could be employed to form a stable reaction bond, it is difficult to limit the reactivity of Sb in YMS such that the electrode is not completely consumed at an operating temperature of 1,000 C. Previous attempts to form suitable metallization layers resulted in poor bonding, complete consumption of the metallization layer or fracture within the YMS thermoelement (or leg).

Firdosy, Samad↗
NASA NTRS2012

Iridium Interfacial Stack - IrIS

Iridium Interfacial Stack (IrIS) is the sputter deposition of high-purity tantalum silicide (TaSi2-400 nm)/platinum (Pt-200 nm)/iridium (Ir-200 nm)/platinum (Pt-200 nm) in an ultra-high vacuum system followed by a 600 C anneal in nitrogen for 30 minutes. IrIS simultaneously acts as both a bond metal and a diffusion barrier. This bondable metallization that also acts as a diffusion barrier can prevent oxygen from air and gold from the wire-bond from infiltrating silicon carbide (SiC) monolithically integrated circuits (ICs) operating above 500 C in air for over 1,000 hours. This TaSi2/Pt/Ir/Pt metallization is easily bonded for electrical connection to off-chip circuitry and does not require extra anneals or masking steps. There are two ways that IrIS can be used in SiC ICs for applications above 500 C: it can be put directly on a SiC ohmic contact metal, such as Ti, or be used as a bond metal residing on top of an interconnect metal. For simplicity, only the use as a bond metal is discussed. The layer thickness ratio of TaSi2 to the first Pt layer deposited thereon should be 2:1. This will allow Si from the TaSi2 to react with the Pt to form Pt2Si during the 600 C anneal carried out after all layers have been deposited. The Ir layer does not readily form a silicide at 600 C, and thereby prevents the Si from migrating into the top-most Pt layer during future anneals and high-temperature IC operation. The second (i.e., top-most) deposited Pt layer needs to be about 200 nm to enable easy wire bonding. The thickness of 200 nm for Ir was chosen for initial experiments; further optimization of the Ir layer thickness may be possible via further experimentation. Ir itself is not easily wire-bonded because of its hardness and much higher melting point than Pt. Below the iridium layer, the TaSi2 and Pt react and form desired Pt2Si during the post-deposition anneal while above the iridium layer remains pure Pt as desired to facilitate easy and strong wire-bonding to the SiC chip circuitry.

Spry, David↗
NASA NTRS2014

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Ray, William Johnstone↗
NASA NTRS2014

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Ray, William Johnstone↗
NASA NTRS2008

Stable Electrical Operation of 6H-SiC JFETs and ICs for Thousands of Hours at 500 C

The fabrication and testing of the first semiconductor transistors and small-scale integrated circuits (ICs) to achieve up to 3000 h of stable electrical operation at 500 C in air ambient is reported. These devices are based on an epitaxial 6H-SiC junction field-effect transistor process that successfully integrated high temperature ohmic contacts, dielectric passivation, and ceramic packaging. Important device and circuit parameters exhibited less than 10% of change over the course of the 500 C operational testing. These results establish a new technology foundation for realizing durable 500 C ICs for combustion-engine sensing and control, deep-well drilling, and other harsh-environment applications.

Neudeck, Philip G.↗
NASA NTRS2005

Measurements of Breakdown Field and Forward Current Stability in 3C-SiC P-N Junction Diodes Grown on Step-Free 4H-SiC

This paper reports on initial fabrication and electrical characterization of 3C-SiC p-n junction diodes grown on step-free 4H-SiC mesas. Diodes with n-blocking-layer doping ranging from approx. 2 x 10(exp 16)/cu cm to approx.. 5 x 10(exp 17)/cu cm were fabricated and tested. No optimization of junction edge termination or ohmic contacts was employed. Room temperature reverse characteristics of the best devices show excellent low-leakage behavior, below previous 3C-SiC devices produced by other growth techniques, until the onset of a sharp breakdown knee. The resulting estimated breakdown field of 3C-SiC is at least twice the breakdown field of silicon, but is only around half the breakdown field of <0001> 4H-SiC for the doping range studied. Initial high current stressing of 3C diodes at 100 A/sq cm for more than 20 hours resulted in less than 50 mV change in approx. 3 V forward voltage. 3C-SiC, pn junction, p+n diode, rectifier, reverse breakdown, breakdown field,heteroepitaxy, epitaxial growth, electroluminescence, mesa, bipolar diode

Neudeck, Philip G.↗
NASA NTRS2016

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over approximately 1-micrometer scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Microelectronics↗
NASA NTRS2016

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over 1-m scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

JFET↗
NASA NTRS2017

Radiation and Temperature Hard Multi-Pixel Avalanche Photodiodes

The structure and method of fabricating a radiation and temperature hard avalanche photodiode with integrated radiation and temperature hard readout circuit, comprising a substrate, an avalanche region, an absorption region, and a plurality of Ohmic contacts are presented. The present disclosure provides for tuning of spectral sensitivity and high device efficiency, resulting in photon counting capability with decreased crosstalk and reduced dark current.

Bensaoula, Abdelhak↗
NASA NTRS1995

A theoretical analysis of steady-state photocurrents in simple silicon diodes.

A theoretical analysis solves for the steady-state photocurrents produced by a given photogeneration rate function with negligible recombination in simple silicon diodes, consisting of a uniformly doped quasi-neutral region (called "substrate" below) between a p-n junction depletion region (DR) and an ohmic contact (electrode). Special attention is given to conditions that produce "funneling" (a term used by the single-event-effects community) under steady-state conditions. Funneling occurs when carriers are generated so fast that the DR becomes flooded and partially or completely collapses. Some or nearly all of the applied voltage plus built-in potential normally across the DR is now across the substrate. This substrate voltage drop affects substrate currents. The steady-state problem can provide some qualitative insights into the more difficult transient problem. Chapter 6 discusses some similarities between the steady-state and transient problems...

Edmonds, Larry↗
DOE OSTI2022

Power MOSFET and JBSFET cell topologies with superior high frequency figure of merit

A vertical insulated-gate field effect transistor includes a semiconductor substrate and a gate electrode on a first surface thereof. This gate electrode has a plurality of eight (or more) sided openings extending therethrough. Each of these openings has eight (or more) sidewalls, including a first plurality of sidewalls that are flat relative to a center of the opening and second plurality of sidewalls that are either flat or concave relative to the center of the opening. A source electrode is also provided, which extends into the openings. This source electrode may ohmically contact a source region within the semiconductor substrate. If the field effect transistor is a JBSFET, the source electrode may also form a Schottky rectifying junction with a drift region within the semiconductor substrate.

Baliga, Bantval Jayant↗
DOE OSTI2021

Compensated Contacts for Three-Terminal Transistor Solar Cells

The heterojunction bipolar transistor solar cell (HBTSC) is an alternative to conventional double-junction solar cells that combines the advantages of three-terminal architectures with a compact design. A critical part of the HBTSC fabrication is the implementation of the middle contact, the one associated to the base layer in the transistor structure, because this layer can be damaged by the diffusion of metallic species during contact annealing. As a solution we propose to implement a "compensated contact", that is, to leave a thin (< 200 nm) portion of emitter or collector between the base layer and the contact metals and compensate its doping during contact annealing. Using an Au/Zn/Au metal structure to compensate a 150 nm thick portion of the collector, we obtain a specific contact resistance ~8 10-4 ..omega.. cm2. This value is fairly invariant for annealing temperatures between 400 and 460 degrees C and annealing times between 2 and 5 minutes, and it does not improve by adding Pd to the metallic stack. Optimizing the compensated contact technology opens the path to the realization of III-V-material-based HBTSCs with open-circuit voltages and fill factors comparable to those of conventional multijunction architectures.

contact resistance↗
DOE OSTI2023

Atomic layer etching (ALE) of III-nitrides

Atomic layer etching (ALE) was performed on (Al, In, Ga)N thin films using a cyclic process of alternating Cl 2 gas absorption and Ar + ion bombardment in an inductively coupled plasma etcher system. The etch damage was characterized by comparing photoluminescence of blue single quantum well light-emitting diodes before and after the etch as well as bulk resistivities of etched p-doped layers. It was found that etched surfaces were smooth and highly conformal, retaining the step-terrace features of the as-grown surface, thus realizing ALE. Longer exposures to the dry etching increased the bulk resistivity of etched surfaces layers slightly, with a damaged depth of ∼55 nm. With further optimization and damage recovery, ALE is a promising candidate for controlled etching with atomic accuracy. Finally, it was found that Al 0.1 Ga 0.9 N acts as an etch barrier for the ALE etch, making it a suitable etch to reveal buried V-defects in III-nitride light emitting diodes.

Atomic-layer etching↗
DOE OSTI2024

Properties of photocurrent and metal contacts of highly resistive ultrawide bandgap semiconductors

Ultrawide bandgap (UWBG) semiconductors inherently exhibit very high electrical resistivities. This property presents not only challenges in probing their electrical transport properties but also difficulties to fabricate, understand, and characterize the electrical properties of metal contacts on these materials. Here, we report the measurements and analysis of the applied electric field dependence of photocurrent to reveal the effect of metal contacts on the transport properties of highly resistive h-BN. Our results indicate that even for h-BN with a room temperature resistivity as high as 1014 Ω cm, the as-deposited metal contact is not a completely blocking type as commonly assumed in previous analyses for other large bandgap insulating materials. By modifying the boundary condition between the metal/semiconductor interface, a quantitative description has been obtained, which can be used to determine if the metal contact is Ohmic or blocking type. This quantitative description should be applicable to all UWBG semiconductors with extremely high electrical resistivities. The work also provides a better understanding of how the metal contact type affects the transport properties of UWBG semiconductors in general.

Physics↗