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At least 199 records · Page 11

Discriminator aided phase lock acquisition for suppressed carrier signals

A discriminator aided technique for acquisition of phase lock to a suppressed carrier signal utilizes a Costas loop which is initially operated open loop and control voltage for its VCXO is derived from a phase detector that compares the VCXO to a reference frequency thus establishing coarse frequency resolution with the received signal. Then the Costas loop is closed with the low-pass filter of the channel having a bandwidth much greater (by a factor of about 10) than in the I channel so that a frequency discriminator effect results to aid carrier resolution. Finally, after carrier acquisition, the Q-channel filter of the Costas loop is switched to a bandwidth substantially equal to that of the I-channel for carrier tracking.

Carson, L. M.↗

Simulation of digital phase-locked loops

Simulation equations are developed for first and second order digital phase locked loops. Examples of loop simulation are given to determine loop performance with respect to several loop parameters.

Blasche, P. R.↗

Demonstration of a low bandwidth 1.06-micron optical phase-locked loop for coherent homodyne communication

A type II 1.06-micron optical phase-locked loop (OPLL) for use in a coherent homodyne receiver is discussed. Diode-laser-pumped solid-state lasers are used for both the local oscillator and transmitter, because their phase noise is significantly lower than that of diode lasers. Closed-loop RMS phase noise of less than 12 mrad (0.69 deg) is achieved, and modulation-demodulation in bulk modulators at rates from 20 kHz to 20 MHz with less than 19 deg of modulation depth is demonstrated.

Day, T.↗

A class of optimum digital phase locked loops

This paper presents a class of optimum digital filters for digital phase locked loops, for the important case in which the maximum update rate of the loop filter and numerically controlled oscillator (NCO) is limited. This case is typical when the loop filter is implemented in a microprocessor. In these situations, pure delay is encountered in the loop transfer function and thus the stability and gain margin of the loop are of crucial interest. The optimum filters designed for such situations are evaluated in terms of their gain margin for stability, dynamic error, and steady-state error performance. For situations involving considerably high phase dynamics an adaptive and programmable implementation is also proposed to obtain an overall optimum strategy.

Kumar, R.↗

Phase-locked injection laser arrays with nonuniform stripe spacing

A new type of phase-locked injection laser array which utilises nonuniform spacing between the lasing stripes has been studied. The variation in spacing alters the stripe-to-stripe coupling which modifies the array mode selection. Arrays that operate with a single far-field lobe have been fabricated.

Ackley, D. E.↗

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Sadr, R.↗

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Sadr, Ramin↗

Carrier arraying with coupled phase-locked loops for tracking improvement

This paper considers a system that couples several phase-locked loops (PLL's) to improve carrier tracking performance. The system coherently combines the received carrier signals at geographically separated ground antennas to increase the total effective aperture. It automatically aligns the received carrier's phases to enhance received carrier signal-to-noise ratio. The tracking performance of this system is being assessed in terms of rms phase jitter.

Divsalar, D.↗

Phase-Locked Loop For Measurement Of Small And Large Delays

Electronic signal-generating and processing subsystem of ultrasonic inspection or measurement system consists mainly of variable-and-fixed-frequency, pulsed phase-locked loop (VFFPPLL) measuring phase shifts from 0 degrees to more than 360 degrees with accurancy of 0.112 degrees. VFFPPLL measures phase shifts between transmitted ultrasonic toneburst and its echo, thereby measuring ultrasonic-propagation delay. Used to determine strain in bolt or to track irregular surface of specimen being inspected ultrasonically.

Froggatt, Mark↗