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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Approaches for Water Removal in Direct-Fired sCO 2 Power Cycles

There is interest in investigation of water removal processes in direct fired sCO 2 flows, as this may potentially lead to greater system efficiency as the removal of this contaminant will result in sCO 2 behaving close to idealized behaviors. Water removal should be split into a two-step process, condensation of the water, followed by separation of the liquid phase water from the sCO 2 . The two main avenues of condensation are manipulation of pressure and temperature for phase change. For this paper, temperature-based phase change is the primary focus through the implementation of heat exchangers. Of the heat exchangers investigated it was found that printed circuit heat exchangers (PCHEs) could be an alternative for this use case, though the specific design of flow channel geometry and flow direction depends on the specific system case and cannot be determined at this point. For water separation there were four processes identified, all of which already assume water is in liquid phase at that point in the system. Of these separation avenues the best candidate is the hydrocyclone as it has a proven history of separating liquid-liquid phase mixtures with small density differences in oilfield use, in addition they have been investigated and modeled specifically for water separation for sCO 2 flows and the footprint is relatively small.

20 FOSSIL-FUELED POWER PLANTS↗
DOE OSTI2022

Flex-PCB Quench Antenna Developments at FNAL

We report flexible printed-circuit-board-based quench antenna arrays have been developed at FNAL since 2017. They proved to be low-noise, low-cost, sensitive, and non-invasive sensors for quench characterization in superconducting magnets, having the potential to extend even to quench detection. Starting with applications of small area sensors of this type, we have explored feasibility for operations at high pressure, and have invested in multi-channel quench antenna arrays covering the complete area of the innermost magnet layer of the conductor. We've also tested and optimized sensor geometry and relative orientations to increase sensitivity and spatial resolution. Beyond developments of warm and cold bore antennas, we've progressed to concepts which attach quench antennas to the conductor surfaces of accelerator magnets. Multiple programs and projects at FNAL and collaborating institutions benefited from this work already and our plans target further extensions of capabilities and applicability of these devices. In this paper we present the logic behind the development steps taken so far, status of our work and direction of near-term research on quench antennas at Fermilab.

43 PARTICLE ACCELERATORS↗
DOE OSTI2022

Detecting Hardware Trojans in PCBs Using Side Channel Loopbacks

Malicious modifications to printed circuit boards (PCBs) are known as hardware Trojans. These may arise when malafide third parties alter PCBs premanufacturing or postmanufacturing and are a concern in safety-critical applications, such as industrial control systems. In this research, we examine how data-driven detection can be utilized to detect such Trojans at run-time. We develop a flexible and reconfigurable PCB test bed derived from the popular open-source programmable logic controller (PLC) platform “OpenPLC.” We then develop a Trojan detection framework, which utilizes and analyzes multimodal side channels (e.g., timing, magnetic signals, power, and hardware performance counters). We consider defender-configurable input/output (I/O) loopback test, comparison with design-document baselines, and magnetometer-aided monitoring of system behavior under defender-chosen excitations. Our approach can extend to golden-free environments. Golden (known-good) versions of the PCBs are assumed not available, but design information, datasheets, and component-level data are available. We demonstrate the efficacy of our approach on a range of Trojans instantiated in the test bed.

42 ENGINEERING↗
DOE OSTI2021

Design of a 2 MW ZrC/W-based molten-salt-to-sCO 2 PCHE for concentrated solar power

To increase the power cycle efficiency and lower the levelized cost of electricity (LCOE) of concentrated solar power (CSP) plants, printed circuit heat exchangers (PCHEs) capable of operating above 700 °C with molten chloride salt and a sCO 2 -based fluid are needed. In this paper, the design of a high-pressure, high-temperature, 2 MW PCHE comprised of a thermomechanically-robust, zirconium carbide/tungsten (ZrC/W) composite is conducted for CSP plants. The ZrC/W composite is a material with high thermal conductivity, high stiffness, and high failure strength at high temperatures, along with excellent resistance to thermal cycling and thermal shock. In this work, a thermomechanical design analysis was conducted to select appropriate material thicknesses of the ZrC/W plates, and to determine the geometrical dimensions and the thermal performance of the PCHE. The influences of the plate number and heat exchanger length on power density and pressure drop have also been systematically investigated. Economic analyses were conducted to compare the cost of ZrC/W-based PCHEs to those comprised of IN740H (a state-of-the-art, nickel-based superalloy) and 316 stainless steel (316SS). Finally, at a sufficiently high plate production rate, the manufacturing cost of ZrC/W-based PCHEs can be significantly lower, while achieving a much higher power density, compared with state-of-the-art, nickel alloy-based and stainless steel-based PCHEs.

14 SOLAR ENERGY↗
DOE OSTI2022

Topology optimization of an airfoil fin microchannel heat exchanger using artificial intelligence

High-performance microchannel heat exchangers are needed to supply heat for power conversion for nuclear microreactors. An airfoil fin microchannel design, constructed of Alloy 617 with helium as the working fluid, is analyzed and optimized using a design of experiments with artificial intelligence techniques. The use of airfoil fins offers the potential to reduce pressure drop across the heat exchanger, as compared to other types of channel configurations. A framework for topology optimization of airfoil fin printed circuit heat exchangers (PCHEs) has been developed that can be readily extended to different fin sizes and shapes, as well as different inlet and operating conditions, materials of construction, and working fluids. An optimization procedure is developed that employs computational fluid dynamics for a set of design points identified using Latin hypercube sampling. Computational fluid dynamics is used to analyze a simplified two-channel configuration where five design parameters are varied – inlet angle, fin scale, extent of staggering, transverse and longitudinal pitches. Two methods (a 5D polynomial and a regression neural network) are compared for generating surrogate models and the resulting response surface approximation is input to a genetic algorithm that is used to identify a set of optimal parameters. The optimal geometries are found across six channel Reynolds numbers ranging from 1000 to 5000, since inlet conditions affect flow through the heat exchanger. Additionally, a set of optimal designs that maximizes heat transfer and minimizes pressure drop is identified, and a thermal stress analysis is performed on the optimal design. Correlations for the Nusselt number and Darcy friction factor are developed that can be useful for thermal hydraulic analyses using system codes. Thermal stresses are analyzed and a brief discussion of the status of code cases of PCHEs for nuclear applications is given. Testing and thermomechanical modeling is needed to facilitate future code compliance of PCHEs for high pressure and high temperature applications.

42 ENGINEERING↗
NASA NTRS1979

Wraparound-contact solar cells

Positive and negative electrical contacts are on back surface of wraparound-contact solar cell. With both terminals on nonilluminated side, cells can be connected back-to-back, and interconnection of many cells can be automated by using printed-circuit techniques. Cells are made by screen-printing layer of dielectric around edge of cell and extending top contact over dielectric to back surface. Wraparound also facilitates application of transparent covers and encapsulants. Efficiencies of cells are in excess of seventeen percent.

Baraona, C. R.↗
NASA NTRS2004

Printed Electronic Devices in Human Spaceflight

The space environment requires robust sensing, control, and automation, whether in support of human spaceflight or of robotic exploration. Spaceflight embodies the known extremes of temperature, radiation, shock, vibration, and static loads, and demands high reliability at the lowest possible mass. Because printed electronic circuits fulfill all these requirements, printed circuit technology and the exploration of space have been closely coupled throughout their short histories. In this presentation, we will explore the space (and space launch) environments as drivers of printed circuit design, a brief history of NASA's use of printed electronic circuits, and we will examine future requirements for such circuits in our continued exploration of space.

Bacon, John B.↗
NASA NTRS1970

Integrated circuit flat-pack lead bender

Tool bends leads quickly and accurately for mounting on printed circuit boards. It has grooves and bend-angles aligned for particular circuit board applications.

Koster, C. H.↗
NASA NTRS2011

MOSFET Switching Circuit Protects Shape Memory Alloy Actuators

A small-footprint, full surface-mount-component printed circuit board employs MOSFET (metal-oxide-semiconductor field-effect transistor) power switches to switch high currents from any input power supply from 3 to 30 V. High-force shape memory alloy (SMA) actuators generally require high current (up to 9 A at 28 V) to actuate. SMA wires (the driving element of the actuators) can be quickly overheated if power is not removed at the end of stroke, which can damage the wires. The new analog driver prevents overheating of the SMA wires in an actuator by momentarily removing power when the end limit switch is closed, thereby allowing complex control schemes to be adopted without concern for overheating. Either an integral pushbutton or microprocessor-controlled gate or control line inputs switch current to the actuator until the end switch line goes from logic high to logic low state. Power is then momentarily removed (switched off by the MOSFET). The analog driver is suited to use with nearly any SMA actuator.

Gummin, Mark A.↗
DOE OSTI2025

All 2D Material Printed Diodes and Circuits on Paper for Sustainable Electronics

Sustainable electronics aim to reduce environmental impact by using ecofriendly materials, energy-efficient manufacturing, and recyclable components. However, existing approaches rely on complex, resource-intensive methods, rare metals, or nanomaterials with limited stability as well as plastic substrates, raising sustainability issues. Solution-processed two-dimensional (2D) materials offer a promising alternative: water-based and biocompatible conductive, semiconductive, and insulating 2D material inks can be produced with scalable techniques and are suitable for the fabrication of fully printed devices on low-cost and biodegradable paper substrates. However, 2D material only and fully printed diodes on paper have not yet been reported. Here, we demonstrate fully inkjet-printed 2D material-based diodes on paper using metal-insulator-semiconductor and metal-insulator-metal-semiconductor architectures. Water-based graphene and MoS2 inks, prepared by liquid-phase exfoliation, are used for the metallic and insulating films, while electrochemical exfoliation is used to produce the semiconducting MoS2 ink. The highest forward-to-reverse current ratio obtained is 330 (at ±2 V), while the forward current density is 1 mA/cm2 (at 1 V), making the diode performance comparable to the best solution-processed diodes reported so far. However, in contrast to previous works, fabrication occurs entirely at room temperature and ambient pressure, without using high-pressure sputtering, thermal evaporation, and any precious metal ink. The devices maintain stable performance under bending up to strain of 4% over 10,000 cycles. Finally, the diodes are successfully integrated with other 2D-material based electrical components to realize fully printed RC circuits, differentiators, integrators, and AC-to-DC converters onto paper, hence demonstrating the suitability of our approach for sustainable and disposable integrated circuits.

2D materials↗
NASA NTRS1981

Cooling/grounding mount for hybrid circuits

Extremely short input and output connections, adequate grounding, and efficient heat removal for hybrid integrated circuits are possible with mounting. Rectangular clamp holds hybrid on printed-circuit board, in contact with heat-conductive ground plate. Clamp is attached to ground plane by bolts.

Bagstad, B.↗
NASA NTRSDate not supplied

A 96% Alumina based Packaging System for 500°C Test of SiC Integrated Circuits

With the development of silicon carbide (SiC) sensors and electronic devices for operation at 500°C, compatible packaging technologies are needed for long term high temperature test and deployment of these sensors and electronic devices. 96% Al2O3ceramic is an excellent electrically insulating material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. This paper presents a packaging system for low power integrated circuits including a prototype 8-I/O chip-level package and printed circuit board (PCB) based on 96% Al2O3ceramic substrates and Au thick-film metallization for 500°C applications. The details related to designs of packages and PCBs, packaging materials, and specific packaging step recipes including wire -bonding and die-attach, are presented. Some test results of this prototype packaging approach applied to SiC integrated circuits at 500°C are reviewed.

High Temperature, Packaging, Alumina, Thick Film↗
NASA NTRSDate not supplied

A 96% Alumina based Packaging System for 500°C Test of SiC Integrated Circuits

With the development of silicon carbide (SiC) sensors and electronic devices for operation at 500°C, compatible packaging technologies are needed for long term high temperature test and deployment of these sensors and electronic devices. 96% Al2O3 ceramic is an excellent electrically insulating material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. This paper presents a packaging system for low power integrated circuits including a prototype 8-I/O chip-level package and printed circuit board (PCB) based on 96% Al2O3 ceramic substrates and Au thick-film metallization for 500°C applications. The details related to designs of packages and PCBs, packaging materials, and specific packaging step recipes including wire - bonding and die-attach, are presented. Some test results of this prototype packaging approach applied to SiC integrated circuits at 500oC are reviewed.

high temperature↗
NASA NTRS1973

Advanced On-Board Processor (AOP)

Advanced On-board Processor the (AOP) uses large scale integration throughout and is the most advanced space qualified computer of its class in existence today. It was designed to satisfy most spacecraft requirements which are anticipated over the next several years. The AOP design utilizes custom metallized multigate arrays (CMMA) which have been designed specifically for this computer. This approach provides the most efficient use of circuits, reduces volume, weight, assembly costs and provides for a significant increase in reliability by the significant reduction in conventional circuit interconnections. The required 69 CMMA packages are assembled on a single multilayer printed circuit board which together with associated connectors constitutes the complete AOP. This approach also reduces conventional interconnections thus further reducing weight, volume and assembly costs.

Source record↗
NASA NTRS1974

Design guidelines for advanced LSI microcircuit packaging using thick film multilayer technology

Ceramic multilayer circuitry results from the sequential build-up of two or more layers of pre-determined conductive interconnections separated by dielectric layers and fired at an elevated temperature to form a solidly fused structure. The resultant ceramic interconnect matrix is used as a base to mount active and passive devices and provide the necessary electrical interconnection to accomplish the desired electrical circuit. Many methods are known for developing multilevel conductor mechanisms such as multilayer printed circuits, welded wire matrices, flexible copper tape conductors, and thin and thick-film ceramic multilayers. Each method can be considered as a specialized field with each possessing its own particular set of benefits and problems. This design guide restricts itself to the art of design, fabrication and assembly of ceramic multilayer circuitry and the reliability of the end product.

Peckinpaugh, C. J.↗
NASA NTRS1981

Cavity-backed, micro-strip dipole antenna array

A flush-mounted antenna assembly includes a generally rectangular, conductive, box structure open along one face to form a cavity. Within the cavity a pair of mutually orthogonal dielectric plane surfaces in an "egg crate" arrangement are mounted normal to the plane of the open face, each diagonally within the cavity. Each dielectric plane supports a pair of printed circuit dipoles typically each fed from the opposite side of the dielectric plane by a printed "cone-shaped" feed line trace which also serve as an impedance matching device and functions as a balun connected from an unbalanced strip line external feed. The open face of the conductive cavity can be flush mounted with a randome thereover, the assembly thereby being flush with the skin of a aircraft or space vehicle.

Ellis, H., Jr.↗
NASA NTRS1973

Printed wiring board system programmer's manual

The printed wiring board system provides automated techniques for the design of printed circuit boards and hybrid circuit boards. The system consists of four programs: (1) the preprocessor program combines user supplied data and pre-defined library data to produce the detailed circuit description data; (2) the placement program assigns circuit components to specific areas of the board in a manner that optimizes the total interconnection length of the circuit; (3) the organizer program assigns pin interconnections to specific board levels and determines the optimal order in which the router program should attempt to layout the paths connecting the pins; and (4) the router program determines the wire paths which are to be used to connect each input pin pair on the circuit board. This document is intended to serve as a programmer's reference manual for the printed wiring board system. A detailed description of the internal logic and flow of the printed wiring board programs is included.

Brinkerhoff, C. D.↗