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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11

Diffraction-Coupled, Phase-Locked Semiconductor Laser Array

Stable, narrow far field produced. Array of lasers fabricated on single chip. Individual laser waveguides isolated from each other except in end portions, where diffraction coupling takes place. Radiation pattern far from laser array has single, sharp central lobe when all lasers operate in phase with each other. Shape of lobe does not vary appreciably with array current. Applications include recording, printing, and range finding.

Katz, Joseph↗

Trends in solid state electronics, part 2

Developments in the fields of semiconductors and magnetics are surveyed. Materials, devices, theory, and fabrication technology are discussed. Important events up until the present time are reported, and events are interpreted through historical perspective. A brief analysis of forces which have driven the development of today's electronic technology and some projections of present trends are given. More detailed discussions are presented for four areas of contemporary interest: amorphous semiconductors, bubble domain devices, charge-coupled devices, and electron and ion beam techniques. Beam addressed magnetic memories are reviewed to a lesser extent.

Gassaway, J. D.↗

NASA Solar Array Demonstrates Commercial Potential

A state-of-the-art solar-panel array demonstration site at NASA's Dryden Flight Research Center provides a unique opportunity for studying the latest in high-efficiency solar photovoltaic cells. This five-kilowatt solar-array site (see Figure 1) is a technology-transfer and commercialization success for NASA. Among the solar cells at this site are cells of a type that was developed in Dryden Flight Research Center s Environmental Research Aircraft and Sensor Technology (ERAST) program for use in NASA s Helios solar-powered airplane. This cell type, now denoted as A-300, has since been transferred to SunPower Corporation of Sunnyvale, California, enabling mass production of the cells for the commercial market. High efficiency separates these advanced cells from typical previously commercially available solar cells: Whereas typical previously commercially available cells are 12 to 15 percent efficient at converting sunlight to electricity, these advanced cells exhibit efficiencies approaching 23 percent. The increase in efficiency is due largely to the routing of electrical connections behind the cells (see Figure 2). This approach to increasing efficiency originated as a solution to the problem of maximizing the degree of utilization of the limited space available atop the wing of the Helios airplane. In retrospect, the solar cells in use at this site could be used on Helios, but the best cells otherwise commercially available could not be so used, because of their lower efficiencies. Historically, solar cells have been fabricated by use of methods that are common in the semiconductor industry. One of these methods includes the use of photolithography to define the rear electrical-contact features - diffusions, contact openings, and fingers. SunPower uses these methods to produce the advanced cells. To reduce fabrication costs, SunPower continues to explore new methods to define the rear electrical-contact features. The equipment at the demonstration site includes two fixed-angle solar arrays and one single-axis Sun-tracking array. One of the fixed arrays contains typical less-efficient commercial solar cells and is being used as a baseline for comparison of the other fixed array, which contains the advanced cells. The Sun-tracking array tilts to follow the Sun, using an advanced, real-time tracking device rather than customary pre-programmed mechanisms. Part of the purpose served by the demonstration is to enable determination of any potential advantage of a tracking array over a fixed array. The arrays are monitored remotely on a computer that displays pertinent information regarding the functioning of the arrays.

Creech, Gray↗

Silicon Carbide High-Temperature Power Rectifiers Fabricated and Characterized

The High Temperature Integrated Electronics and Sensors (HTIES) team at the NASA Lewis Research Center is developing silicon carbide (SiC) for use in harsh conditions where silicon, the semiconductor used in nearly all of today's electronics, cannot function. Silicon carbide's demonstrated ability to function under extreme high-temperature, high power, and/or high-radiation conditions will enable significant improvements to a far ranging variety of applications and systems. These improvements range from improved high-voltage switching for energy savings in public electric power distribution and electric vehicles, to more powerful microwave electronics for radar and cellular communications, to sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines. In the case of jet engines, uncooled operation of 300 to 600 C SiC power actuator electronics mounted in key high-temperature areas would greatly enhance system performance and reliability. Because silicon cannot function at these elevated temperatures, the semiconductor device circuit components must be made of SiC. Lewis' HTIES group recently fabricated and characterized high-temperature SiC rectifier diodes whose record-breaking characteristics represent significant progress toward the realization of advanced high-temperature actuator control circuits. The first figure illustrates the 600 C probe-testing of a Lewis SiC pn-junction rectifier diode sitting on top of a glowing red-hot heating element. The second figure shows the current-versus voltage rectifying characteristics recorded at 600 C. At this high temperature, the diodes were able to "turn-on" to conduct 4 A of current when forward biased, and yet block the flow of current ($quot;turn-off") when reverse biases as high as 150 V were applied. This device represents a new record for semiconductor device operation, in that no previous semiconductor electronic device has ever simultaneously demonstrated 600 C functionality, and 4-A turn-on and 150-V rectification. The high operating current was achieved despite severe device size limitations imposed by present-day SiC wafer defect densities. Further substantial increases in device performance can be expected when SiC wafer defect densities decrease as SiC wafer production technology matures.

Source record↗

Combined GaAs laser outputs

Technique for combining outputs of array of small semiconductor lasers increases total output power while relaxing fabrication tolerances to make manufacture potentially less costly. Advantage of free-running mode is that spacing between junction-diode lasers is less critical than for conventional, phase-coherently coupled arrays.

Rutz, E. M.↗

High Temperature Performance of a SiC MESFET Based Oscillator

A hybrid, UHF-Band differential oscillator based on 10 w SiC RF Power Metal Semiconductor Field Effect Transistor (MESFET) has been designed, fabricated and characterized through 475 C. Circuit is fabricated on an alumina substrate with thin film spiral inductors, chip capacitors, chip resistors, and wire bonds for all crossovers and interconnectors. The oscillator delivers 15.7 dBm at 515 MHz into a 50 Ohm load at 125 C with a DC to RF conversion efficiency of 2,8%. After tuning the load impedance, the oscillator delivers 18.8 dBm at 610 MHz at 200 C with a DC to RF conversion efficiency of 5.8%. Finally, by tuning the load and bias conditions, the oscillator delivers 4.9 dBm at 453 MHz at 475 C.

Schwartz, Zachary D.↗

Radiation-Hard SpaceWire/Gigabit Ethernet-Compatible Transponder

A radiation-hard transponder was developed utilizing submicron/nanotechnology from IBM. The device consumes low power and has a low fabrication cost. This device utilizes a Plug-and-Play concept, and can be integrated into intra-satellite networks, supporting SpaceWire and Gigabit Ethernet I/O. A space-qualified, 100-pin package also was developed, allowing space-qualified (class K) transponders to be delivered within a six-month time frame. The novel, optical, radiation-tolerant transponder was implemented as a standalone board, containing the transponder ASIC (application specific integrated circuit) and optical module, with an FPGA (field-programmable gate array) friendly parallel interface. It features improved radiation tolerance; high-data-rate, low-power consumption; and advanced functionality. The transponder utilizes a patented current mode logic library of radiation-hardened-by-architecture cells. The transponder was developed, fabricated, and radhard tested up to 1 MRad. It was fabricated using 90-nm CMOS (complementary metal oxide semiconductor) 9 SF process from IBM, and incorporates full BIT circuitry, allowing a loop back test. The low-speed parallel LVCMOS (lowvoltage complementary metal oxide semiconductor) bus is compatible with Actel FPGA. The output LVDS (low-voltage differential signaling) interface operates up to 1.5 Gb/s. Built-in CDR (clock-data recovery) circuitry provides robust synchronization and incorporates two alarm signals such as synch loss and signal loss. The ultra-linear peak detector scheme allows on-line control of the amplitude of the input signal. Power consumption is less than 300 mW. The developed transponder with a 1.25 Gb/s serial data rate incorporates a 10-to-1 serializer with an internal clock multiplication unit and a 10-1 deserializer with internal clock and data recovery block, which can operate with 8B10B encoded signals. Three loop-back test modes are provided to facilitate the built-in-test functionality. The design is based on a proprietary library of differential current switching logic cells implemented in the standard 90-nm CMOS 9SF technology from IBM. The proprietary low-power LVDS physical interface is fully compatible with the SpaceWire standard, and can be directly connected to the SFP MSA (small form factor pluggable Multiple Source Agreement) optical transponder. The low-speed parallel interfaces are fully compatible with the standard 1.8 V CMOS input/output devices. The utilized proprietary annular CMOS layout structures provide TID tolerance above 1.2 MRad. The complete chip consumes less than 150 mW of power from a single 1.8-V positive supply source.

Katzman, Vladimir↗

NASA Feedback to DLA Land & Maritime Moratorium on Wafer Fab Audits

On September 29, 2017 the Defense Logistics Agency (DLA), Land and Maritime, announced that on September 1, 2017 they had begun a moratorium on the auditing of wafer fabrication facilities (fabs) used in the production of semiconductor die for military (MIL) qualified integrated circuits and discrete semiconductors (transistors and diodes). The announcement said the moratorium would last for six months initially and would apply to all wafer fabs qualified to MIL-PRF-19500 (discretes) and MIL-PRF-38535 (ICs) located, onshore or offshore. The stated rationale behind this action was to give DLA time to evaluate the risk of modifying current surveillance practices across 70+ Federal Stock Classes (FSC) under the jurisdiction of the DLA Qualifying Activity (VQ). The objective was to free up the resources used in these audits so they could be redirected towards audits of other commodities which were under resourced, notably connectors. In the announcement letter, DLA-VQ requested data from the community to assist with decisions on wafer fab re-audit cycle modifications. NASA used available information on current and historical audit schedules to gather such data and analyzed it to provide an in-depth understanding of the impact of locations, part types, in-house or out-of-house fabs on those schedules over time. This presentation provides the results of NASA's data analysis and suggest some changes to auditing practices that could increase efficient use of resources without significant increases in risk.

fab audits↗

Inter-Valence-Subband/Conduction-Band-Transport IR Detectors

Infrared (IR) detectors characterized by a combination of (1) high-quantum-efficiency photoexcitation of inter-valence-subband transitions of charge carriers and (2) high-mobility conduction- band transport of the thus-excited charge carriers have been proposed in an effort to develop focal-plane arrays of such devices for infrared imaging. Like many prior quantum-well infrared photodetectors (QWIPs), the proposed devices would be made from semiconductor heterostructures. In order to obtain the combination of characteristics mentioned above, the proposed devices would be designed and fabricated in novel InAs/GaSb superlattice configurations that would exploit a phenomenon known in the semiconductor art as type-II broken-gap band offset.

Ting, David↗

Lateral coherence properties of broad-area semiconductor quantum well lasers

The lateral coherence of broad-area lasers fabricated from a GaAs/GaAlAs graded index waveguide separate confinement and single quantum well heterostructure grown by molecular-beam epitaxy was investigated. These lasers exhibit a high degree of coherence along the junction plane, thus producing a stable and very narrow far field intensity distribution.

Larsson, A.↗

Alternative Packaging for Back-Illuminated Imagers

An alternative scheme has been conceived for packaging of silicon-based back-illuminated, back-side-thinned complementary metal oxide/semiconductor (CMOS) and charge-coupled-device image-detector integrated circuits, including an associated fabrication process. This scheme and process are complementary to those described in "Making a Back-Illuminated Imager With Back-Side Connections" (NPO-42839), NASA Tech Briefs, Vol. 32, No. 7 (July 2008), page 38. To avoid misunderstanding, it should be noted that in the terminology of imaging integrated circuits, "front side" or "back side" does not necessarily refer to the side that, during operation, faces toward or away from a source of light or other object to be imaged. Instead, "front side" signifies that side of a semiconductor substrate upon which the pixel pattern and the associated semiconductor devices and metal conductor lines are initially formed during fabrication, and "back side" signifies the opposite side. If the imager is of the type called "back-illuminated," then the back side is the one that faces an object to be imaged. Initially, a back-illuminated, back-side-thinned image-detector is fabricated with its back side bonded to a silicon handle wafer. At a subsequent stage of fabrication, the front side is bonded to a glass wafer (for mechanical support) and the silicon handle wafer is etched away to expose the back side. The frontside integrated circuitry includes metal input/output contact pads, which are rendered inaccessible by the bonding of the front side to the glass wafer. Hence, one of the main problems is to make the input/output contact pads accessible from the back side, which is ultimately to be the side accessible to the external world. The present combination of an alternative packaging scheme and associated fabrication process constitute a solution of the problem.

Pain, Bedabrata↗

Multijunction high-voltage solar cell

Multijunction cell allows for fabrication of high-voltage solar cell on single semiconductor wafer. Photovoltaic energy source using cell is combined on wafer with circuit it is to power. Cell consists of many voltage-generating regions internally or externally interconnected to give desired voltage and current combination. For computer applications, module is built on silicon wafer with energy for internal information processing and readouts derived from external light source.

Evans, J. C., Jr.↗

Upgrading Metallurgical-Grade Silicon

Closed-loop process produces semiconductor-grade silicon. Metallurgical-grade silicon converted to ultrapure silicon by reacting with hydrogen and silicon tetrahalide to form trihalosilane, purifying this intermediate and again decomposing to high purity silicon in third stage. Heterogeneously and homogeneously nucleated polycrystalline silicon used in semiconductor device applications and in silicon photovoltaic solar cell fabrication.

Woerner, L. M.↗

Space station power semiconductor package

A package of high-power switching semiconductors for the space station have been designed and fabricated. The package includes a high-voltage (600 volts) high current (50 amps) NPN Fast Switching Power Transistor and a high-voltage (1200 volts), high-current (50 amps) Fast Recovery Diode. The package features an isolated collector for the transistors and an isolated anode for the diode. Beryllia is used as the isolation material resulting in a thermal resistance for both devices of .2 degrees per watt. Additional features include a hermetical seal for long life -- greater than 10 years in a space environment. Also, the package design resulted in a low electrical energy loss with the reduction of eddy currents, stray inductances, circuit inductance, and capacitance. The required package design and device parameters have been achieved. Test results for the transistor and diode utilizing the space station package is given.

Balodis, Vilnis↗

Microfabricated Chemical Sensors for Safety and Emission Control Applications

Chemical sensor technology is being developed for leak detection, emission monitoring, and fire safety applications. The development of these sensors is based on progress in two types of technology: 1) Micromachining and microfabrication (MicroElectroMechanical Systems (MEMS)-based) technology to fabricate miniaturized sensors. 2) The development of high temperature semiconductors, especially silicon carbide. Using these technologies, sensors to measure hydrogen, hydrocarbons, nitrogen oxides, carbon monoxide, oxygen, and carbon dioxide are being developed. A description is given of each sensor type and its present stage of development. It is concluded that microfabricated sensor technology has significant potential for use in a range of aerospace applications.

Hunter, G. W.↗

Microelectromechanical System (MEMS) Device Being Developed for Active Cooling and Temperature Control

High-capacity cooling options remain limited for many small-scale applications such as microelectronic components, miniature sensors, and microsystems. A microelectromechanical system (MEMS) using a Stirling thermodynamic cycle to provide cooling or heating directly to a thermally loaded surface is being developed at the NASA Glenn Research Center to meet this need. The device can be used strictly in the cooling mode or can be switched between cooling and heating modes in milliseconds for precise temperature control. Fabrication and assembly employ techniques routinely used in the semiconductor processing industry. Benefits of the MEMS cooler include scalability to fractions of a millimeter, modularity for increased capacity and staging to low temperatures, simple interfaces, limited failure modes, and minimal induced vibration. The MEMS cooler has potential applications across a broad range of industries such as the biomedical, computer, automotive, and aerospace industries. The basic capabilities it provides can be categorized into four key areas: 1) Extended environmental temperature range in harsh environments; 2) Lower operating temperatures for electronics and other components; 3) Precision spatial and temporal thermal control for temperature-sensitive devices; and 4) The enabling of microsystem devices that require active cooling and/or temperature control. The rapidly expanding capabilities of semiconductor processing in general, and microsystems packaging in particular, present a new opportunity to extend Stirling-cycle cooling to the MEMS domain. The comparatively high capacity and efficiency possible with a MEMS Stirling cooler provides a level of active cooling that is impossible at the microscale with current state-of-the-art techniques. The MEMS cooler technology builds on decades of research at Glenn on Stirling-cycle machines, and capitalizes on Glenn s emerging microsystems capabilities.

Beach, Duane E.↗