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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12

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NASA NTRS1984

LEC GaAs for integrated circuit applications

Recent developments in liquid encapsulated Czochralski techniques for the growth of semiinsulating GaAs for integrated circuit applications have resulted in significant improvements in the quality and quantity of GaAs material suitable for device processing. The emergence of high performance GaAs integrated circuit technologies has accelerated the demand for high quality, large diameter semiinsulating GaAs substrates. The new device technologies, including digital integrated circuits, monolithic microwave integrated circuits and charge coupled devices have largely adopted direct ion implantation for the formation of doped layers. Ion implantation lends itself to good uniformity and reproducibility, high yield and low cost; however, this technique also places stringent demands on the quality of the semiinsulating GaAs substrates. Although significant progress was made in developing a viable planar ion implantation technology, the variability and poor quality of GaAs substrates have hindered progress in process development.

Kirkpatrick, C. G.↗

NASA NTRS1984

Soft-error generation due to heavy-ion tracks in bipolar integrated circuits

Both bipolar and MOS integrated circuits have been empirically demonstrated to be susceptible to single-particle soft-error generation, commonly referred to as single-event upset (SEU), which is manifested in a bit-flip in a latch-circuit construction. Here, the intrinsic characteristics of SEU in bipolar (static) RAM's are demonstrated through results obtained from the modeling of this effect using computer circuit-simulation techniques. It is shown that as the dimensions of the devices decrease, the critical charge required to cause SEU decreases in proportion to the device cross-section. The overall results of the simulations are applicable to most integrated circuit designs.

Zoutendyk, J. A.↗

NASA NTRS1988

Difference-Equation/Flow-Graph Circuit Analysis

Numerical technique enables rapid, approximate analyses of electronic circuits containing linear and nonlinear elements. Practiced in variety of computer languages on large and small computers; for circuits simple enough, programmable hand calculators used. Although some combinations of circuit elements make numerical solutions diverge, enables quick identification of divergence and correction of circuit models to make solutions converge.

Mcvey, I. M.↗

NASA NTRS1988

Protective Socket For Integrated Circuits

Socket for intergrated circuits (IC's) protects from excessive voltages and currents or from application of voltages and currents in wrong sequence during insertion or removal. Contains built-in switch that opens as IC removed, disconnecting leads from signals and power. Also protects other components on circuit board from transients produced by insertion and removal of IC. Makes unnecessary to turn off power to entire circuit board so other circuits on board continue to function.

Wilkinson, Chris↗

NASA NTRS1988

Simulation of proton-induced energy deposition in integrated circuits

A time-efficient simulation technique was developed for modeling the energy deposition by incident protons in modern integrated circuits. To avoid the excessive computer time required by many proton-effects simulators, a stochastic method was chosen to model the various physical effects responsible for energy deposition by incident protons. Using probability density functions to describe the nuclear reactions responsible for most proton-induced memory upsets, the simulator determines the probability of a proton hit depositing the energy necessary for circuit destabilization. This factor is combined with various circuit parameters to determine the expected error-rate in a given proton environment. An analysis of transient or dose-rate effects is also performed. A comparison to experimental energy-disposition data proves the simulator to be quite accurate for predicting the expected number of events in certain integrated circuits.

Fernald, Kenneth W.↗

NASA NTRS1988

Integrated circuit reliability testing

A technique is described for use in determining the reliability of microscopic conductors deposited on an uneven surface of an integrated circuit device. A wafer containing integrated circuit chips is formed with a test area having regions of different heights. At the time the conductors are formed on the chip areas of the wafer, an elongated serpentine assay conductor is deposited on the test area so the assay conductor extends over multiple steps between regions of different heights. Also, a first test conductor is deposited in the test area upon a uniform region of first height, and a second test conductor is deposited in the test area upon a uniform region of second height. The occurrence of high resistances at the steps between regions of different height is indicated by deriving the measured length of the serpentine conductor using the resistance measured between the ends of the serpentine conductor, and comparing that to the design length of the serpentine conductor. The percentage by which the measured length exceeds the design length, at which the integrated circuit will be discarded, depends on the required reliability of the integrated circuit.

Buehler, Martin G.↗

NASA NTRS1989

A programmable CCD driver circuit for multiphase CCD operation

A programmable CCD (charge-coupled device) driver circuit was designed to drive CCDs in multiphased modes. The purpose of the drive electronics is to operate developmental CCD imaging arrays for NASA's tiltable moderate resolution imaging spectrometer (MODIS-T). Five objectives for the driver were considered during its design: (1) the circuit drives CCD electrode voltages between 0 V and +30 V to produce reasonable potential wells, (2) the driving sequence is started with one input signal, (3) the driving sequence is started with one input signal, (4) the circuit allows programming of frame sequences required by arrays of any size, (5) it produces interfacing signals for the CCD and the DTF (detector test facility). Simulation of the driver verified its function with the master clock running up to 10 MHz. This suggests a maximum rate of 400,000 pixels/s. Timing and packaging parameters were verified. The design uses 54 TTL (transistor-transistor logic) chips. Two versions of hardware were fabricated: wirewrap and printed circuit board. Both were verified functionally with a logic analyzer.

Ewin, Audrey J.↗

NASA NTRS1990

Ge/Si Integrated Circuit For Infrared Imaging

Proposed integrated circuit consists of focal-plane array of metal/germanium Schottky-barrier photodetectors on same chip with silicon-based circuits that processes signals from photodetectors. Made compatible with underlying silicon-based circuitry by growing germanium epitaxially on silicon circuit wafers. Metal deposited in ultrahigh vacuum immediately after growth of germanium. Combination of described techniques results in high-resolution infrared-imaging circuits of superior performance.

Fathauer, Robert W.↗

NASA NTRS1988

The role of power integrated circuits in lightweight spacecraft

This paper will present definitions for smart power and power integrated circuits and show how, for a typical planetary spacecraft power system, a 37 percent reduction in mass, 89 percent reduction in parts and a 50 percent reduction in volume can be attained. Also discussed are the technology needs for isolation, monolithic current sensing, and high efficiency switching necessary to enable monolithic power structures, as well as various applications of power integrated circuits. A specific example will verify the projected reductions expected when power integrated circuits are implemented in future spacecraft designs. In conclusion, power-integrated circuits can impact the overall design of the spacecraft in all subsystems, not just the power sybsystem.

Klein, John W.↗

NASA NTRS1991

Microwave integrated circuits for space applications

Monolithic microwave integrated circuits (MMIC), which incorporate all the elements of a microwave circuit on a single semiconductor substrate, offer the potential for drastic reductions in circuit weight and volume and increased reliability, all of which make many new concepts in electronic circuitry for space applications feasible, including phased array antennas. NASA has undertaken an extensive program aimed at development of MMICs for space applications. The first such circuits targeted for development were an extension of work in hybrid (discrete component) technology in support of the Advanced Communication Technology Satellite (ACTS). It focused on power amplifiers, receivers, and switches at ACTS frequencies. More recent work, however, focused on frequencies appropriate for other NASA programs and emphasizes advanced materials in an effort to enhance efficiency, power handling capability, and frequency of operation or noise figure to meet the requirements of space systems.

Leonard, Regis F.↗

NASA NTRS1992

Performance of a Y-Ba-Cu-O superconducting filter/GaAs low noise amplifier hybrid circuit

A superconducting 7.3 GHz two-pole microstrip bandpass filter and a GaAs low noise amplifier (LNA) were combined into an active circuit and characterized at liquid nitrogen temperatures. This superconducting/semiconducting circuit's performance was compared to a gold filter/GaAs LNA hybrid circuit. The superconducting filter/GaAs LNA hybrid circuit showed higher gain and lower noise figure than its gold counterpart.

Bhasin, K. B.↗

NASA NTRS1991

Q-switched laser prelase detection circuit

A compact electronic circuit was developed to detect prelasing in Q-swithed pulsed laser systems and once detected to shut down the laser before the next laser pulse occurs. The circuit is small, compact, and uses a minimum of components which makes it quite economical, thus readily lending itself to commercial applications. It can easily be incorporated into virtually any Q-switched laser system or reliability of a laser system by reducing a source of possible costly optical damage. The circuit operation and instrument requirements necessary to incorporate the circuit into a laser system are discussed.

Lockard, George E.↗

NASA NTRS1992

Performance of a Y-Ba-Cu-O superconducting filter/GaAs low noise amplifier hybrid circuit

A superconducting 7.3 GHz two-pole microstrip bandpass filter and a GaAs low noise amplifier (LNA) were combined into a hybrid circuit and characterized at liquid nitrogen temperatures. This superconducting/seismology circuit's performance was compared to a gold filter/GaAs LNA hybrid circuit. The superconducting filter/GaAs LNA hybrid circuit showed higher gain and lower noise figure than its gold counterpart.

Bhasin, Kul B.↗

NASA NTRS1991

Sliding backshorts for planar circuits

An adjustable planar imbedding circuit based on coplanar transmission lines is presented to deal with the impedance mismatch associated with the use of the Superconductor-Insulator-Superconductor tunnel junction. The planar embedding circuit is developed with movable noncontacting shorting elements that consist of thin metallic plates with optimized arrangements of rectangular holes. The rectangular holes are placed along the insulated metallic transmission line to provide a periodic variation of the line impedance. A large reflection coefficient is demonstrated with a scale model of the sliding backshort, and values of more than -0.5 dB are reported. The shorting elements are incorporated into a low-frequency tuning circuit to test the practical tuning ranges. The backshort can be used to fashion tuning stubs with variable post-fabrication electrical lengths which relaxes the design constraints of planar integrated circuits.

Lubecke, Victor M.↗

NASA NTRS1993

Fast Overcurrent Tripping Circuit

Fast overcurrent tripping circuit designed for incorporation into power metal oxide/semiconductor field-effect transistor (MOSFET) switching circuit. Serves as fast electronic circuit breaker by sensing voltage across MOSFET's during conduction and switching MOSFET's off within 1 microsecond after voltage exceeds reference value corresponding to tripping current. Acts more quickly than Hall-effect current sensor and, in comparison with shunt current-measuring circuits, smaller and consumes less power. Also ignores initial transient overcurrents during first 5 microseconds of switching cycle.

Sullender, Craig C.↗

NASA NTRS1993

High Speed Solid State Circuit Breaker

The U.S. Army Research Laboratory, Fort Monmouth, NJ, has developed and is installing two 3.3 MW high speed solid state circuit breakers at the Army's Pulse Power Center. These circuit breakers will interrupt 4160V three phase power mains in no more than 300 microseconds, two orders of magnitude faster than conventional mechanical contact type circuit breakers. These circuit breakers utilize Gate Turnoff Thyristors (GTO's) and are currently utility type devices using air cooling in an air conditioned enclosure. Future refinements include liquid cooling, either water or two phase organic coolant, and more advanced semiconductors. Each of these refinements promises a more compact, more reliable unit.

Podlesak, Thomas F.↗

NASA NTRS1992

Investigation into the common mode rejection ratio of the physiological signal conditioner circuit

The common mode rejection ratio (CMRR) of the single operational amplifier (op amp) differential amplifier and of the three operational amplifier differential amplifier was investigated. The three op amp differential amplifier circuit is used in the signal conditioner circuit which amplifies signals such as the electromyograph or electrocardiogram. The investigation confirmed via SPICE modeling what has been observed by others in the recent literature that the CMRR for the circuit can be maximized without precision resistor values or precisely matched op amps. This can be done if one resistor in the final stage can be adjusted either by a potentiometer or by laser trimming in the case of hybrid circuit fabrication.

Obrien, Edward M.↗

NASA NTRS1992

Self synchronized asynchronous sequential pass transfer circuits

A new class of CMOS VLSI asynchronous sequential circuits utilizing pass transistors is introduced. This class of self synchronizing circuits eliminates the need for critical race free state assignments. These circuits synchronize the transition path action by forcing the circuit to sequence through proper unstable states.

Whitaker, Sterling R.↗