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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond Timing

Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specifc integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verifed using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.

Fredenburg, Jeff↗
NASA NTRS1999

Spinoff 1999

A survey is presented of NASA-developed technologies and systems that were reaching commercial application in the course of 1999. Attention is given to the contributions of each major NASA Research Center. Representative 'spinoff' technologies include the predictive AI engine monitoring system EMPAS, the GPS-based Wide Area Augmentation System for aircraft navigation, a CMOS-Active Pixel Sensor camera-on-a-chip, a marine spectroradiometer, portable fuel cells, hyperspectral camera technology, and a rapid-prototyping process for ceramic components.

JET PROPULSION LABORATORY↗
NASA NTRS2012

Scaled CMOS Reliability and Considerations for Spacecraft Systems: Bottom-Up and Top-Down Perspective

New space missions will increasingly rely on more advanced technologies because of system requirements for higher performance, particularly in instruments and high-speed processing. Component-level reliability challenges with scaled CMOS in spacecraft systems from a bottom-up perspective have been presented. Fundamental Front-end and Back-end processing reliability issues with more aggressively scaled parts have been discussed. Effective thermal management from system-level to the componentlevel (top-down) is a key element in overall design of reliable systems. Thermal management in space systems must consider a wide range of issues, including thermal loading of many different components, and frequent temperature cycling of some systems. Both perspectives (top-down and bottom-up) play a large role in robust, reliable spacecraft system design.

Scaled CMOS↗
DOE OSTI2021

Hybrid MEMS-CMOS ion traps for NISQ computing

Surging interest in engineering quantum computers has stimulated significant and focused research on technologies needed to make them manufacturable and scalable. In the ion trap realm this has led to a transition from bulk three-dimensional macro-scale traps to chip-based ion traps and included important demonstrations of passive and active electronics, waveguides, detectors, and other integrated components. At the same time as these technologies are being developed the system sizes are demanding more ions to run noisy intermediate scale quantum (NISQ) algorithms, growing from around ten ions today to potentially a hundred or more in the near future. To realize the size and features needed for this growth, the geometric and material design space of microfabricated ion traps must expand. In this paper we describe present limitations and the approaches needed to overcome them, including how geometric complexity drives the number of metal levels, why routing congestion affects the size and location of shunting capacitors, and how RF power dissipation can limit the size of the trap array. Finally, we also give recommendations for future research needed to accommodate the demands of NISQ scale ion traps that are integrated with additional technologies.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRS2014

Advanced CMOS Radiation Effects Testing and Analysis

Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

cmos↗
NASA NTRS2023

Ionizing Radiation Effects on Hole Collection Backside-Illuminated P-Type Deep-Trench Pinned Photo-MOS Pixels under Image Acquisition

Dark current degradation, origins, and annealing behavior after x-ray irradiation are studied in a P-type, hole collecting, backside-illuminated image sensor currently being developed at STMicroelectronics and based on deep-trenched photo-MOS pixels. Different biasing conditions during irradiation, i.e. grounded or biased and sequenced, are compared. The dark current increase with total ionizing dose (TID) and the dark current annealing behavior seem to be driven by the backside interface between the P-epitaxy of the pixels and the ONO stack. Despite still being under development, this pixel architecture already exhibits both very good electro-optical performance and a better radiation hardness than pinned photodiode-based CMOS Image sensors that benefit from the same advanced CIS processing technologies. At high total dose range, the photogate challenges custom Radiation-Hardened-by-Design photodiodes by exhibiting a comparable radiation tolerance while bringing new features such as high-resolution or Correlated Double Sampling.

CMOS Image Sensor (CIS)↗
DOE OSTI2023

Field‐Induced Ferroelectric Phase Evolution During Polarization “Wake‐Up” in Hf 0.5 Zr 0.5 O 2 Thin Film Capacitors

Abstract As an emerging nonvolatile memory technology, HfO 2 ‐based ferroelectrics exhibit excellent compatibility with silicon CMOS process flows; however, the reliability of polarization switching in these materials remains a major challenge. During repeated field programming and erase of the polarization state of initially pristine HfO 2 ‐based ferroelectric capacitors, the magnitude of the measured polarization increases, a phenomenon known as “wake‐up”. In this study, the authors attempt to understand what causes the wake‐up effect in Hf 0.5 Zr 0.5 O 2 (HZO) capacitors using nondestructive methods that probe statistically significant sample volumes. Synchrotron X‐ray diffraction reveals a concerted shift in HZO Bragg peak position as a function of polarization switching cycle number in films prepared under conditions such that they exhibit extremely large (≈3000%) wake‐up. In contrast, a control sample with insignificant wake‐up shows no such peak shift. Capacitance – voltage measurements show evolution in the capacitance loop with switching cycle number for the wake‐up sample and no change for the control sample. Piezoresponse force microscopy measurements are utilized to visualize the domain switching with wake‐up. The combination of these observations clearly demonstrates that wake‐up is caused by a field‐driven phase transformation of the tetragonal phase to the metastable ferroelectric orthorhombic phase during polarization switching of HZO capacitors.

36 MATERIALS SCIENCE↗
DOE OSTI2026

ALD-Derived WO 3– x Leads to Nearly Wake-Up-Free Ferroelectric Hf 0.5 Zr 0.5 O 2 at Elevated Temperatures

Breaking the memory wall in advanced computing architectures will require complex 3D integration of emerging memory materials such as ferroelectrics─either within the back-end-of-line (BEOL) of CMOS front-end processes or through advanced 3D packaging technologies. Achieving this integration demands that memory materials exhibit high thermal resilience, with the capability to operate reliably at elevated temperatures, such as 125°C, due to the substantial heat generated by front-end transistors. However, silicon-compatible HfO 2 -based ferroelectrics tend to exhibit antiferroelectric-like behavior in this temperature range, accompanied by a more pronounced wake-up effect, posing significant challenges to their thermal reliability. Here, we report that by introducing a thin tungsten oxide (WO 3–x ) layer─known as an oxygen reservoir─and carefully tuning its oxygen content, ultrathin Hf 0.5 Zr 0.5 O 2 (5 nm) films can be made robust against the ferroelectric-to-antiferroelectric transition at elevated temperatures. This approach not only minimizes polarization loss in the pristine state but also effectively suppresses the wake-up effect, reducing the required wake-up cycles from 10 5 to only 10 at 125°C, a qualifying temperature for back-end memory integrated with front-end logic, as defined by the JEDEC standard. First-principles density functional theory (DFT) calculations reveal that WO 3 enhances the stability of the ferroelectric orthorhombic phase (o-phase) at elevated temperatures by increasing the tetragonal-to-orthorhombic phase energy gap and promoting favorable phonon mode evolution, thereby supporting o-phase formation under both thermodynamic and kinetic constraints.

36 MATERIALS SCIENCE↗
NASA NTRS2007

324GHz CMOS VCO Using Linear Superimposition Technique

Terahertz (frequencies ranged from 300GHz to 3THz) imaging and spectroscopic systems have drawn increasing attention recently due to their unique capabilities in detecting and possibly analyzing concealed objects. The generation of terahertz signals is nonetheless nontrivial and traditionally accomplished by using either free-electron radiation, optical lasers, Gunn diodes or fundamental oscillation by using III-V based HBT/HEMT technology[1-3]... We have substantially extended the operation range of deep-scaled CMOS by using a linear superimposition method, in which we have realized a 324GHz VCO in 90nm digital CMOS with 4GHz tuning range under 1V supply voltage. This may also pave the way for ultra-high data rate wireless communications beyond that of IEEE 802.15.3c and reach data rates comparable to that of fiber optical communications, such as OC768 (40Gbps) and beyond.

voltage controlled oscillators (VCO)↗
DOE OSTI2020

PbE (E = S, Se) Colloidal Quantum Dot-Layered 2D Material Hybrid Photodetectors

Hybrid lead chalcogenide (PbE) (E = S, Se) quantum dot (QD)-layered 2D systems are an emerging class of photodetectors with unique potential to expand the range of current technologies and easily integrate into current complementary metal-oxide-semiconductor (CMOS)-compatible architectures. Herein, we review recent advancements in hybrid PbE QD-layered 2D photodetectors and place them in the context of key findings from studies of charge transport in layered 2D materials and QD films that provide lessons to be applied to the hybrid system. Photodetectors utilizing a range of layered 2D materials including graphene and transition metal dichalcogenides sensitized with PbE QDs in various device architectures are presented. Figures of merit such as responsivity (R) and detectivity (D*) are reviewed for a multitude of devices in order to compare detector performance. Finally, a look to the future considers possible avenues for future device development, including potential new materials and device treatment/fabrication options.

36 MATERIALS SCIENCE↗
NASA NTRS1976

Successful large-scale use of CMOS devices on spacecraft traveling through intense radiation belts

This paper describes the environmental models of the radiation belts and computational techniques which have been developed for predicting the radiation hazards for spacecraft. These data and techniques are then applied to the Atmosphere Explorer 51 spacecraft to explain its successful survival for more than 18 months in a severe environment. In particular, the results of the analysis are used to explain the performance of some 2400 CMOS devices, and consequently, they demonstrate the reliability of this device technology in spacecraft systems.

Brucker, G. J.↗
NASA NTRS1982

Development of a microwave 20 x 20 switch matrix for 30/20 GHz SS-TDMA application

The design and fabrication of a 3-8 GHz, 20 x 20 Satellite Switched-Time Division Multiple Access IF switch matrix applicable to a 30/20 GHz communications satellite are described. An assessment of switch architecture in 1980 concluded that the GaAs FET-based coupled crossbar switch matrix, incorporating high speed CMOS LSI logic for switch crosspoint addressing, would be the optimum technology available for communications satellite switching by 1982. This assessment was based on such factors as switching speed, bandwidth, off-state isolation, and reliability, over a 10-year mission life. A proof-of-concept model's construction and testing are presented.

Cory, B. J.↗
NASA NTRS2004

Smart Camera Technology Increases Quality

When it comes to real-time image processing, everyone is an expert. People begin processing images at birth and rapidly learn to control their responses through the real-time processing of the human visual system. The human eye captures an enormous amount of information in the form of light images. In order to keep the brain from becoming overloaded with all the data, portions of an image are processed at a higher resolution than others, such as a traffic light changing colors. changing colors. In the same manner, image processing products strive to extract the information stored in light in the most efficient way possible. Digital cameras available today capture millions of pixels worth of information from incident light. However, at frame rates more than a few per second, existing digital interfaces are overwhelmed. All the user can do is store several frames to memory until that memory is full and then subsequent information is lost. New technology pairs existing digital interface technology with an off-the-shelf complementary metal oxide semiconductor (CMOS) imager to provide more than 500 frames per second of specialty image processing. The result is a cost-effective detection system unlike any other.

Source record↗
NASA NTRS2011

Radiation Status of Sub-65 nm Electronics

Ultra-scaled complementary metal oxide semiconductor (CMOS) includes commercial foundry capabilities at and below the 65 nm technology node Radiation evaluations take place using standard products and test characterization vehicles (memories, logic/latch chains, etc.) NEPP focus is two-fold: (1) Conduct early radiation evaluations to ascertain viability for future NASA missions (i.e. leverage commercial technology development). (2) Uncover gaps in current testing methodologies and mechanism comprehension -- early risk mitigation.

Pellish, Jonathan A.↗
DOE OSTI2024

Thermally generated magnonic spin currents in a polycrystalline gadolinium iron garnet thin film with perpendicular magnetic anisotropy

Rare-earth iron garnets (REIGs) are the benchmark systems for magnonics, including the longitudinal spin Seebeck effect (LSSE). While most research has focused on single-crystalline REIGs on complimentary garnet substrates, moving to more, cost-effective complementary metal-oxide semiconductor (CMOS)-compatible substrates is important to integrate REIG thin films with existing technology. In this regard, we grow a 130 nm-thick polycrystalline gadolinium iron garnet (GdIG) film on the Si/SiO2 substrate and investigate the temperature-dependent LSSE. Interestingly, the polycrystalline GdIG film exhibits perpendicular magnetic anisotropy (PMA) at room temperature which is induced by tensile in-plane (IP)-strain originating from the thermal-expansion mismatch between the GdIG film and the substrate during rapid thermal annealing. Further, a spin-reorientation transition from the out-of-plane IP direction below TS = 180 K is observed. Additionally, the film reveals a magnetic compensation temperature, TComp, of ≈240 K. The LSSE voltage not only demonstrates a sign-inversion around TComp, but also shows noticeable changes around TS. As compared to a single-crystalline GdIG film, the lower LSSE voltage for the polycrystalline GdIG is attributed to the higher effective magnetic anisotropy and enhanced magnon scattering at the grain boundaries. Our study not only paves the way for the cost-effective growth of CMOS-compatible REIG-based systems with PMA for magnonic memory and information processing applications, but also highlights the fact that the spincaloritronic and spin-insulatronic properties of the polycrystalline REIGs follow those of their single-crystalline counterparts with reduced spin-to-charge conversion efficiency through LSSE which can be tuned further by controlling the average gran size and interface engineering.

Physics↗
DOE OSTI2026

Phase Synergy Enables Low‐Power Ferroelectric Switching in HfO 2 Epitaxial Films

HfO 2 -based ferroelectric materials have emerged as leading candidates for next-generation non-volatile memory technologies, owing to their nanoscale robust ferroelectricity and complementary metal–oxide–semiconductor (CMOS) compatibility. However, challenges and debates persist in advancing and comprehensively understanding their ferroelectric behavior. In particular, conventional approaches typically regard non-ferroelectric phases as detrimental and primarily focus on suppressing their formation, yet overlooking their potentially synergistic contributions—particularly those of the tetragonal (T) phase. Here, we unambiguously clarify the beneficial role of the T-phase and introduce a phase-boundary engineering strategy that deliberately harnesses it to enhance ferroelectricity in HfO 2 films. By stabilizing optimal coherent boundaries between ferroelectric orthorhombic (O) and T phases in epitaxial La-doped HfO 2 films, we achieve significant improvements in ferroelectric properties—doubling the remanent polarization (P r ∼ 30 µC/cm 2 ) and substantially reducing the coercive field (E c ∼ 3 MV/cm) by 30% compared to low-La doped samples without such boundaries. Atomic-scale electron microscopy reveals the structural nature of the atomically sharp, coherent O–T boundaries. Combined with deep-learning enhanced molecular dynamics simulations, our results unravel that these boundaries facilitate intermediate polarization states that lower the switching energy barrier. Consequently, phase coexistence shifts from an inherent drawback to a tunable design element, offering a broadly applicable route to ultra-low-power HfO 2 -based nanoelectronics.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
NASA NTRS2014

Criticality of Low-Energy Protons in Single-Event Effects Testing of Highly-Scaled Technologies

We report low-energy proton and low-energy alpha particle single-event effects (SEE) data on a 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) latches and static random access memory (SRAM) that demonstrates the criticality of using low-energy protons for SEE testing of highly-scaled technologies. Low-energy protons produced a significantly higher fraction of multi-bit upsets relative to single-bit upsets when compared to similar alpha particle data. This difference highlights the importance of performing hardness assurance testing with protons that include energy distribution components below 2 megaelectron-volt. The importance of low-energy protons to system-level single-event performance is based on the technology under investigation as well as the target radiation environment.

random access memory↗