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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12

Maximum Sample Temperature for Mars Sample Return: A Historical Perspective

Since the first Mars Sample Return (MSR) report published by the Jet Propulsion Laboratory (JPL) in 1974 [1], a series of panels, reports, and white papers have recognized the importance of sample temperature and offered an informed sample maximum temperature (henceforth SMT) limit for returning martian samples to Earth. The Mars Sample Handling and Requirements Panel (MSHARP, 1999) stated that "[t]he main issue in sample preservation is temperature" [2]. More recently, the Mars Exploration Program Analysis Group (MEPAG)'s "Science Priorities for Mars Sample Return" report (2008), declared that "[s]ignificant loss, particularly to biological studies, occurs if samples reach +50C for three hours", whereby "scientific objectives related to life goals could be seriously compromised" [3]. By contrast, the Mars 2020 mission has adopted a SMT of +60C as spelled out in Beaty et al., 2016 [4]. Samples will be collected and then deposited on the surface in sealed tubes for possible retrieval and return to Earth. Beaty et al. [4] calculates that the samples will experience maximum temperatures of ~+30 to +60C, depending on latitude. At present, there is no mission requirement for the measurement/data logging of sample temperature during this period. We will explore the history of martian SMTs, as they have been recorded since 1974 [1], effectively representing input across multiple generations of Mars scientists. Ten separate publications present SMTs for MSR samples [1-10]. One report [10] is for a mission concept specifically designed to exclude life detection investigations, and recommended an SMT of 50C. Another did not specify a temperature, recommending "Mars ambient temperature" [5]. Of the remaining eight, SMTs are given as: -30C [1], -20C [3], 60C [4], -73 to 41C depending on sample type [6], -40C [7], -43 to 13C depending on type [2,8], and -33C [9]. If we restrict the temperatures to samples highlighted in the Mars 2020 mission goals, i.e. organics-bearing and sedimentary rocks, then the average SMT is -28+/-39C (n=8). Applying a Dixon's Q Test at P=0.05 (two-tailed), the 60C SMT [4] fails with Q=0.602 versus Qcrit=0.526. Excluding the outlier produces an average SMT of -40+/-17C (n=7). Therefore, the average SMT expressed by the Mars science community over the past 44 years (two generations) is a sample temperature no greater than -40C. The difference in chemical reaction rates between this average SMT and Beaty et al [4] can be estimated using the Arrhenius equation. Assuming a generic chemical reaction with an activation energy of 50 kJ/mol and a pre-exponential factor invariant with temperature, this reaction will proceed 2300x faster at 60C than at -40C. To illustrate the effects of the increased reaction rate, consider 10 ppb of alanine in a Mars 2020 cache, and assume that it becomes unmeasurable if it degrades to 1 ppb, as per the Mars 2020 Organic Contamination Panel contamination limits [11]. If we illustrate the effect with an arbitrary degradation rate such that the alanine will become undetectable in ten years at -40C, then the same 10 ppb alanine degrades beyond detectability in only 38 days at 60C. Further research is required to quantify expected analyte losses in the cached samples due to thermal processing.

Fries, Marc↗

Overcoming Pitfalls When Using HDF5 Compression

Compression of large datasets in S-NPP, JPSS and other HDF5 data files may substantially reduce their size, in turn reducing disk space requirements and file download time. However, mismatches between the layout of the files' datasets, the HDF5 instance's cache settings, choice of compression algorithm, and the access pattern of applications using the data can sometimes result in poor performance or exhausting machine resources when running the application. Whether designed in advance or modified in response to encountered problems, applications can be tuned to optimize efficiency of data access, avoid unnecessary repeated decompression, and reduce the amount of memory used. Examples will be given of problems that may be encountered, how to use available tools to diagnose or work around them, changing cache settings to conserve memory, and designing access strategies to avoid both performance and memory issues when creating or modifying applications.

performance↗

Accessing Data Stored in Amazon S3 Using the Hyrax OPeNDAP Server

For three years we have been investigating data storage and retrieval in the Amazon Cloud, striving to optimize both storage structures and (cache-enhanced retrieval processes. These optimizations are hidden from data users, who simply employ the Data Access Protocol (DAP), a popular, Web-based Application Programmer Interface (API) developed by OPeNDAP. We present our collected findings and their realization in the Hyrax data server. Specific techniques include caching data on spinning disk; accessing sharded data in place; optimizing the organizational structures for data within the flat key-value space of Simple Storage Service (S3); and employing an API extension that permits simultaneous operations on many datasets in a single request.

Data access↗

Frequency dependence of single-event upset in advanced commercial PowerPC microprocessors

Single-event upset (SEU) from heavy ions is measured for advanced commercial microprocessors in a dynamic mode with clock frequencies up to 1 GHz. Frequency and core voltage dependence of SEUs in registers and D-Cache are discussed. The results of our studies suggest the SEU in registers and D-Cache tend to increase with frequency. This might have important implications for the overall SEU trend as technology moves toward higher frequencies.

Farmanesh, F. F.↗

Towards a Qualification Data Set: Expanded SEE Data on the P2020 Processor

Earlier P2020 SEE data are compared and expanded to a recent die revision, significantly increasing samples tested by protons by five devices, and by heavy ions by five devices. Earlier tested SEE types are found to be fairly similar in register, L1 cache, L2 cache, and CPU crashes. New test methods give SEE performance for the flash memory controller, watchdog circuit, and a built-in Ethernet port on the P2020 processor. Results from heavy ion and proton tests are presented, with data separated over a large number of specific error types and test programs.

Vartanian, Sargeh↗

Dynamic Shared Computing Resources for Multi-Robot Mars Exploration

The NASA roadmap for 2020 and beyond includes several key technologies which will have a game-changing impact on planetary exploration. The first of these is High Performance Spaceflight Computing (HPSC), which will provide orders of magnitude increases in processing power for next-generation rovers and orbiters (Doyle et al. 2013). The second is Delay Tolerant Networking, which overlays the Deep Space Network, providing internet-like abstractions and store-forward to route data through intermittent delays in connectivity. The third is a trend toward small, co-dependent robots included in flagship missions (MarCO, PUFFER, and Mars Heli). Taken together, these imply an increasing amount of communication and computing heterogeneity on Mars in coming decades. Motivated by these technological trends, we study the concept of Mars on-site shared analysis, information, and communication (MOSAIC) for Mars exploration. The key algorithmic problem associated with MOSAIC networks is simultaneous scheduling of computation, communication, and caching of data, which we illustrate using the three scenarios. We present models, preliminary solutions, and simulation results for two scenarios, showing how mission efficiency relates to communication bandwidth, processing power, geography of the environment, and optimal scheduling of computation, communication, and data caching. The third scenario illustrates future directions of this work.

Chien, Steve↗

Performance Optimization Methods for a Memory-Bound, Unstructured-Grid CFD Application on Massively Parallel GPU Platforms

Computational performance of the FUN3D unstructured-grid computational fluid dynamics (CFD) application on massively parallel GPU environments is memory-bound and highly dependent upon efficient reads from and atomic updates to the irregular cell-, edge-, and node-based data structures. In this talk, we present recent efforts into optimizing select performance-critical kernels on NVIDIA Tesla V100 and A100 GPUs and AMD CDNA MI100 GPUs. A novel use of L2 cache residency controls and asynchronous loads into on-chip shared memory are explored on the A100 GPU for the sparse iterative solver, which is dominated by mixed-precision, sparse matrix vector multiplication. Demonstrations show that these methods improve global memory bandwidth utilization by 13.5% on the A100 GPU. Several techniques are also presented that use registers and/or shared memory to facilitate array transposition and aggregation which combine to reduce the frequency and increase the cache efficiency of floating-point atomic updates to the irregular data structures. These methods are demonstrated to improve the kernel throughput by nearly 500% on select kernels on the AMD MI100 over atomic updates directly to global memory. Overall, both V100 and A100 GPUs outperformed the MI100 GPU on kernels dominated by double-precision atomic updates; however, the techniques demonstrated here reduced the performance gap and improved the MI100 performance.

GPU CPU unstructured CFD memory↗

First 210 solar days of Mars 2020 Perseverance Robotic Operations – Mobility, Robotic Arm, Sampling, and Helicopter

This paper includes the summary, lessonslearned, and upcoming plans for the first 210 Mars solar days(sols) of the mission. The focus of the paper is on roboticoperations which has the primary responsibility for strategicplanning, uplink commanding and downlink analysis forrover mobility and navigation, robotic arm operation, thesampling and caching capability including coring, theadaptive caching assembly and the 2nd sample handlingrobotic arm, and interface to the Mars helicopter Ingenuity.As of Sol 210 the rover has driven 2663.65 meters, executed20764 robotic arm and sampling commands, and hassuccessfully completed 13 helicopter flights covering 2382meters horizontal distance. It includes the OperationsReadiness Tests in preparation for landing, landing and initialcheckouts, strategic route planning to the science destinationand waypoints, surface checkout of all of the roboticscapability of the rover. It also discusses the strategic planningand tactical agility needed for interleaving scienceinvestigation and technology demonstration of the Marshelicopter flights where a minimum distance had to bemaintained between the rover and helicopter during flights. Itdiscusses the challenges with planning robotic operations andaddressing anomalies with the larger uncertainty presentduring early mission operations. It also discusses the impacton robotic operations from lessons incorporated fromprevious missions.

Ono, Hiro↗

Exploring the Jezero Delta Front: Overview of Results From the Mars 2020 Perseverance Rover’s Second Science Campaign

The Perseverance rover landed in Jezero crater on February 18, 2021, with the mission goals to explore the geology, astrobiological potential, and modern environment of the crater floor and delta, and to collect and cache well-documented samples for Mars Sample Return. After completion of the “Crater Floor” science campaign, the rover conducted a rapid traverse (sols 379-414) to the Three Forks region of the crater floor adjacent to the delta front. From here, Perseverance’s second “Delta Front” science campaign (DFC) began on Sol 415, April 20, 2022. The DFC has explored two lobes of the delta front, the neighboring crater floor, and their contact zone, focusing on the lowest geologic exposures composing the Jezero delta (largely mapped within the delta “thin layered unit”). As of January 1, 2023, Perseverance has covered 14325 km of traverse distance and collected 15 rock sample cores, 2 regolith samples, 1 atmospheric sample, and 3 witness tubes, employing a sample pair strategy where each unique sample is paired with a companion sample core from the same location, to enable the construction of two different caches. After sample depot construction at Three Forks, the DFC will conclude upon re-ascent of the delta front, and the next “Delta Top” science campaign will start.

Mars 2020 Mission↗

The Scientific Significance of Potential Samples From the Jezero Crater Rim

The Mars 2020 Perseverance rover has been exploring Jezero crater, Mars to characterize the geology,assess the potential for rocks to represent ancient habitable environments and/or preserve biosignatures, and collect a suite of scientifically compelling samples for return to Earth (Farleyet al.,2020).Thus far, Perseverance has collected samples that represent the diversity of igneous materials encountered on the crater floor and a suite of aqueously deposited sedimentary rocks from the fanand margin units(Simon et al., 2023; Bosak et al., 2024). When the rover ascendsthe crater rimit will encounter rocktypesthat are not included in the current sample cache. These include rocks fromthe Noachian whose mineralogical, geochemical, and geochronological recordswould greatly expand our understanding of early Mars. Some of the exposures are understood to come from subsurface aquifers that may represent the most ancient potentially habitablesubsurfaceenvironmentson Mars(Ehlmann et al., 2024). Samples ofthese rocks will add uniquescientific value tothe sample cache and to the Mars sample returnprogramby addressing outstanding questions in Mars science including potential habitability and how the climate and the interior of the planet evolved through time.

Mars 2020↗

Leaky Buddies: Cross-Component Covert Channels on Integrated CPU-GPU Systems

Graphics Processing Units (GPUs) are ubiquitous components used across the range of today’s computing plat- forms, from phones and tablets, through personal computers, to high-end server class platforms. With the increasing importance of graphics and video workloads, recent processors are shipped with GPU devices that are integrated on the same chip. Integrated GPUs share some resources with the CPU and as a result, there is a potential for microarchitectural attacks from the GPU to the CPU or vice versa. We consider the potential for covert channel attacks that arise either from shared microarchitectural components (such as caches) or through shared contention domains (e.g., shared buses). We illustrate these two types of channels by developing two reliable covert channel attacks. The first covert channel uses the shared LLC cache in Intel’s integrated GPU architectures. The second is a contention based channel targeting the ring bus connecting the CPU and GPU to the LLC. This is the first demonstrated microarchitectural attack crossing the component boundary (GPU to CPU or vice versa). Cross-component channels introduce a number of new challenges that we had to overcome since they occur across heterogeneous components that use different computation models and are interconnected using asymmetric memory hierarchies. We also exploit GPU parallelism to increase the bandwidth of the communication, even without relying on a common clock. The LLC based channel achieves a bandwidth of 120 kbps with a low error rate of 2%, while the contention based channel delivers up to 400 kbps with a 0.8% error rate. We also demonstrate a proof- of-concept prime-and-probe side channel attack that probes the full LLC from the GPU.

Cyber secruity, high performance comptuing, Hetero↗

Accelerating Collective Communication in Data Parallel Training across Deep Learning Frameworks

This work develops new techniques within Horovod, a generic communication library supporting data parallel training across deep learning frameworks. In particular, we improve the Horovod control plane by implementing a new coordination scheme that takes advantage of the characteristics of the typical data parallel training paradigm, namely the repeated execution of collectives on the gradients of a fixed set of tensors. Using a caching strategy, we execute Horovod’s existing coordinator-worker logic only once during a typical training run, replacing it with a more efficient decentralized orchestration strategy using the cached data and a global intersection of a bitvector for the remaining training duration. Next, we introduce a feature for end users to explicitly group collective operations, enabling finer grained control over the communication buffer sizes. To evaluate our proposed strategies, we conduct experiments on a world-class supercomputer — Summit. We compare our proposals to Horovod’s original design and observe 2x performance improvement at a scale of 6000 GPUs; we also compare them against tf.distribute and torch.DDP and achieve 12% better and comparable performance, respectively, using up to 1536 GPUs; we compare our solution against BytePS in typical HPC settings and achieve about 20% better performance on a scale of 768 GPUs. Finally, we test our strategies on a scientific application (STEMDL) using up to 27,600 GPUs (the entire Summit) and show that we achieve a near-linear scaling of 0.93 with a sustained performance of 1.54 exaflops (with standard error +- 0.02) in FP16 precision.

Romero, Joshua↗

SLIP (Surrogate Launching and Integration Platform)

SLIP (Surrogate Launching and Integration Platform) is a software ecosystem for downloading and running ML/AI benchmarks. SLIP automatically downloads and sets up the code and data running a benchmark. The large data sets and model code are cached locally with a specific ID within a designated cache directory.

Brown, Cade↗

Amorphous Indium Oxide Channel FEFETs With Write Voltage of 0.9 V and Endurance >10 12 for Refresh-Free Embedded Memory

This work presents, for the first time, a back-end-of-the-line (BEOL)-compatible W-doped indium oxide (IWO) ferroelectric field-effect transistor (FEFET) with a record-low operating voltage below 0.9 V and a write speed of 20 ns while achieving a transient read current window (CW) ratio ( I LVT /I HVT ) greater than 10 4 . The device also exhibits exceptional reliability characteristics such as: 1) measured bipolar write endurance up to 10 12 cycles; 2) a fast read speed of 50 ns; 3) read endurance surpassing 10 12 cycles; and 4) retention exceeding 10 4 s at 85 ∘ C. Furthermore, a physics-based numerical model has been developed to investigate the nanoscale characteristics of BEOL FEFET devices, leveraging nucleation-limited switching in HfO 2 ferroelectrics and dc characterization to extract material and channel parameters for accurate device simulation. The simulation uncovers the stochastic switching behavior of BEOL amorphous oxide semiconductor (AOS) FEFETs and demonstrates an intrinsic switching time as low as 1 ps, highlighting the potential of BEOL AOS FEFETs for ultrafast memory applications. These results establish AOS FEFETs as a compelling candidate for high-density embedded memory applications for last-level cache (LLC) (L4) in advanced CMOS technology nodes.

1-V ferroelectric field-effect transistor (FEFET)↗

Quantum Dynamics at Scale: Ultrafast Control of Emergent Functional Materials

Confluence of extreme-scale quantum dynamics simulations (i.e. quantum@scale) and cutting-edge x-ray free-electron laser experiments are revolutionizing materials science. An archetypal example is the exciting concept of using picosecond light pulses to control emergent material properties on demand in atomically-thin layered materials. This paper describes efforts to scale our quantum molecular dynamics engine toward the United States' first exaflop/s computer, under an Aurora Early Science Program project named "Metascalable layered material genome". Key algorithmic and computing techniques incorporated are: (1) globally-scalable and locally-fast solvers within a linear-scaling divide-conquer-recombine algorithmic framework; (2) algebraic `BLASification' of computational kernels; and (3) data alignment and loop restructuring, along with register and cache blocking, for enhanced vectorization and efficient memory access. The resulting weak-scaling parallel efficiency was 0.93 on 131,072 Intel Xeon Phi cores for a 56.6 million atom (or 169 million valence-electron) system, whereas the various code transformations achieved 5-fold speedup. The optimized simulation engine allowed us for the first time to establish a significant effect of substrate on the dynamics of layered material upon electronic excitation.

Algebraic BLASification↗

Optimization of Particle-in-Cell Codes on RISC Processors

General strategies are developed to optimize particle-cell-codes written in Fortran for RISC processors which are commonly used on massively parallel computers. These strategies include data reorganization to improve cache utilization and code reorganization to improve efficiency of arithmetic pipelines.

particle-cell-codes cache utilization code reorgan↗

Initial SEE Testing of Maestro

We have reported on initial SEE sensitivity of the full 49-core Maestro device. Supporting the low-level structures and qualitative system observation goals of phase 1 of testing. Observed sensitivities found to be consistent with Boeing predictions. Highlighted by the L1 data cache sensitivity which drives the rates on the current Maestro device. Presented details to the hardware and software setups that show where the limitations - highlighting future work. Key future work includes testing with memory and IO ports.

cache sensitivity↗

Rotary Percussive Sample Acquisition Tool

As part of a potential Mars Sample Return campaign NASA is studying a sample caching mission to Mars, with a possible 2018 launch opportunity. As such, a Sample Acquisition Tool (SAT) has been developed in support of the Integrated Mars Sample Acquisition and Handling (IMSAH) architecture as it relates to the proposed Mars Sample Return (MSR) campaign. The tool allows for core generation and capture directly into a sample tube. In doing so, the sample tube becomes the fundamental handling element within the IMSAH sample chain reducing the risk associated with sample contamination as well as the need to handle a sample of unknown geometry. The tool's functionality was verified utilizing a proposed rock test suite that encompasses a series of rock types that have been utilized in the past to qualify Martian surface sampling hardware. The corresponding results have shown the tool can effectively generate, fracture, and capture rock cores while maintaining torque margins of no less than 50% with an average power consumption of no greater than 90W and a tool mass of less than 6kg.

Sample Acquisition and Caching (SAC)↗