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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS2017

Kinetics of Moisture Sorption and Reverse Bias Degradation in Chip Tantalum Capacitors

Exposure of chip MnO2 tantalum capacitors to humid environments might result in increased ESR, leakage currents, and first turn-on failures. However, there is a lack of literature data on the effect of moisture on reverse bias behavior of the parts. The presence of moisture can also result in pop-corning when a high water vapor pressure develops when moisture absorbed in pores of tantalum slugs vaporizes instantly during soldering process resulting in damage to capacitors. A study of kinetics of moisture ingress to and release from active elements of capacitors would allow a better understanding of degradation mechanisms and is important for preventing failures. In this work, a technique for investigation of moisture sorption and desorption in solid chip tantalum capacitors that employs tantalum slugs as a humidity sensor have been developed and kinetics of the process analyzed for different types of capacitors at temperatures from room to 125 C. A model that relates diffusion characteristics of polymer cases and size of the slugs to characteristic times of moisture sorption has been developed. A strong effect of moisture on long-term degradation of reverse bias currents in MnO2 cathode capacitors has been demonstrated and physical mechanisms discussed.

Teverovsky, Alexander↗
NASA NTRS2001

InP MMIC chip set for power sources covering 86-170 GHz

We will present a Monolithic Millimeter-wave Integrated Circuit (MMIC) chip set which provides high output-power sources for driving diode frequency multipliers into the terahertz range. The chip set was fabricated at HRL Laboratories using a 0.l-μm gatelength InAI/InGaAs/InP high electron mobility transistor (HEMT) process, and features transistors with an fmax above 600 GHz. The HRL InP HEMT process has already demonstrated amplifiers in the 60-200 GHz range. In this paper, these high frequency HEMTs form the basis for power sources up to 170 GHz.

Ngo, Catherine↗
NASA NTRS1996

256X256 CMOS Active Pixel Sensor Camera-on-a-Chip

A CMOS imaging sensor is described that uses active pixel sensor (APS) technology which permits the integration of the detector array with on-chip timing, control and signal chain electronics. This sensor has been used to implement a CMOS APS camera-on-a-chip.

active↗
NASA NTRS1996

Progress in Voltage and Current Mode On-Chip Analog-to-Digital converters for CMOS Image Sensors

Two 8 bit successive approximation analog-to-digital converter (ADC) designs and a 12 bit current mode incremental sigma delta ADC have been designed, fabricated, and tested. The successive approximation test chip designs are compatible with active pixel sensor (APS) column parallel architectures with a 20.4 ??itch in a 1.2 ??-well CMOS process and a 40 ??itch in a 2 ??-well CMOS process. The successive approximation designs consume as little as 49 ??t a 500 KHz conversion rate meeting the low power requirements inherent in column parallel architectures. The current mode incremental sigma-delta ADC test chips designed to be multiplied among 8 columns in a semi-column parallel current mode APS architecture. The higher accuracy ADC consumes 800 ??t a 5 KHz.

analog-to-digital↗
NASA NTRS2018

LiveCheckHSI: a Hardware/Software Co-verification Tool for Hyperspectral Imaging Systems with Embedded System-on-Chip Instrument Avionics

The emergent technology of system-on-chip (SoC) devices promises lighter, smaller, cheaper, and more capable and reliable space electronic systems that could help to unveil some of the most treasured secrets in our universe. This technology is an improvement over the technology that is currently used in space applications, which lags behind state-of-the-art commercial-off-the-shelf (COTS) equipment by several generations. SoC technology integrates all computational power required by next-generation space exploration science instruments onto a single chip. This paper describes hardware/software co-verification tools for the Xilinx Zynq-based control and data handling system that have been developed at the Jet Propulsion Laboratory (JPL) for visible-infrared imaging spectrometers. The system acquires and compresses images in real-time, in addition to programming the spectrometer (frame rate, exposure time), focus step motor, and heaters and reporting telemetry.

Dolman, David↗
NASA NTRS2018

High Performance Space Computing with System-on-Chip Instrument Avionics for Space-based Next Generation Imaging Spectrometers (NGIS).

The emergent technology of system-on-chip (SoC) devices promises lighter, smaller, cheaper, and more capable and reliable space electronic systems that could help to unveil some of the most treasured secrets in our universe. This technology is an improvement over the technology that is currently used in space applications, which lags behind stateof-the-art commercial-off-the-shelf (COTS) equipment by several generations. SoC technology integrates all computational power required by next-generation space exploration science instruments onto a single chip. This presentation will describe a Xilinx Zynq-based data acquisition, cloud-screening and compression computing system that has been developed at the Jet Propulsion Laboratory (JPL) for JPL’s Next Generation Imaging Spectrometers (NGIS). The Xilinx Zynq-based Alpha Data hardware assembly fits into a 120mm by 190m by 40mm assembly and uses 9 watts at peak performance. The computing element is a Xilinx Zynq Z7045Q which includes a Kintex-7 FPGA (equivalent to 3 RAD Virtex5 FPGAs in terms of logic cell resources) and dual-core ARM Cortex-A9 Processors (equivalent to 10 RAD750 Power PCs in term of processing capability).

Smith, Adam↗
NASA NTRS2018

High Performance Space Computing with System-on-Chip Instrument Avionics for Space-based Next Generation Imaging Spectrometers (NGIS).

The emergent technology of system-on-chip (SoC) devices promises lighter, smaller, cheaper, and more capable and reliable space electronic systems that could help to unveil some of the most treasured secrets in our universe. This technology is an improvement over the technology that is currently used in space applications, which lags behind state-of-the-art commercial-off-the-shelf (COTS) equipment by several generations. SoC technology integrates all computational power required by next-generation space exploration science instruments onto a single chip. This presentation will describe a Xilinx Zynq-based data acquisition, cloud-screening and compression computing system that has been developed at the Jet Propulsion Laboratory (JPL) for JPL’s Next Generation Imaging Spectrometers (NGIS). The Xilinx Zynq-based Alpha Data hardware assembly fits into a 120mm by 190m by 40mm assembly and uses 9 watts at peak performance. The computing element is a Xilinx Zynq Z7045Q which includes a Kintex-7 FPGA (equivalent to 3 RAD Virtex5 FPGAs in terms of logic cell resources) and dual-core ARM Cortex-A9 Processors (equivalent to 10 RAD750 Power PCs in term of processing capability).

Dolinar, Sam↗
NASA NTRS2019

High performance space computing with system-on-chip instrument avionics for space-based Next Generation Imaging Spectrometers (NGIS)

The emergent technology of system-on-chip (SoC) devices promises lighter, smaller, cheaper, and more capable and reliable space electronic systems that could help to unveil some of the most treasured secrets in our universe. This technology is an improvement over the technology that is currently used in space applications, which lags behind state-of-the-art commercial-off-the-shelf (COTS) equipment by several generations. SoC technology integrates all computational power required by next-generation space exploration science instruments onto a single chip. This presentation will describe a Xilinx Zynq-based data acquisition, cloud-screening and compression computing system that has been developed at the Jet Propulsion Laboratory (JPL) for JPL’s Next Generation Imaging Spectrometers (NGIS). The Xilinx Zynq-based Alpha Data hardware assembly fits into a 120mm by 190m by 40mm assembly and uses 9 watts at peak performance. The computing element is a Xilinx Zynq Z7045Q which includes a Kintex-7 FPGA (equivalent to 3 RAD Virtex5 FPGAs in terms of logic cell resources) and dual-core ARM Cortex-A9 Processors (equivalent to 10 RAD750 Power PCs in term of processing capability).

Dolinar, Sam↗
NASA NTRS2021

Thermal Systems Modeling of Chemical Integrated Power Source (CHIPS) to Survive Lunar Night Environments

This paper presents the results of the systems level thermal modeling for a conceptual Chemical Heat Integrated Power Source (CHIPS). This proposed system offers a combined thermal and electrical power source to support survival of spacecraft operating in extreme low temperature lunar environments, without the use of radioisotope-based sources. A conceptual design study has been completed for this system, that uses heat generated by an exothermic chemical reaction in place of radioisotope or electrical heat sources. The goal of the study was to evaluate the feasibility of such as system through thermodynamic and chemical analysis and thermal modeling, and to identify technology gaps to inform a technology development and maturation plan. The specific technical objectives focused on delivery of 90-100 Wth thermal power and 30-40 We electrical power for 336 hours to a representative Commercial Lunar Payload Services (CLPS) lander, to support lunar surface survival and limited operations through a lunar night. The total system mass was targeted at ≤50 kg. A highly exothermic chemical reaction system is used to generate on-board electrical power for spacecraft systems, and thermal power to maintain critical spacecraft/lander systems within their allowable flight temperature (AFTs). Based on the very high energy content of the chemical reaction system, a much higher amount of heat per unit mass can be delivered to the spacecraft, relative to a rechargeable lithium-ion battery and electrical heater(s). Since radioisotope heaters or generators are not used, the system will be orders of magnitude lower in cost than a radioisotope heating/power unit, without the attendant regulatory complexities. As part of the CHIPS concept, a fraction of the thermal power generated is converted to electrical power via an appropriate thermal-to-electric converter technology (such as a free piston Stirling converter or a thermoelectric generator module), to provide power to critical loads. This approach is ideally suited to support operation of commercial landers (e.g., via the CLPS program). In most cases, these landers are only designed to operate during a portion of the lunar day, with no provision for survival through the lunar night. By supporting lunar night survival, a mission can be extended through the lunar night and at least into another lunar day, thus turning a nominal eight-day mission into a 36-day mission. Therefore, the current system demonstration will focus on scalability to support at least 336 hours (one lunar night) of continuous thermal and electrical power generation. Although initially targeted to support lunar equatorial landings, the technology is extensible to missions at the lunar poles, other extreme environments in the Solar System or even air-independent applications on Earth (e.g., ocean exploration).

West, William↗
NASA NTRS2021

Thermal Systems Modeling of Chemical Heat Integrated Power Source (CHIPS) to Survive Lunar Night Environments

This paper presents the results of the systems level thermal modeling for a conceptual Chemical Heat Integrated Power Source (CHIPS). This proposed system offers a combined thermal and electrical power source to support survival of spacecraft operating in extreme low temperature lunar environments, without the use of radioisotope-based sources. A conceptual design study has been completed for this system, that uses heat generated by an exothermic chemical reaction in place of radioisotope or electrical heat sources. The goal of the study was to evaluate the feasibility of such a system through thermodynamic and chemical analysis and thermal modeling, and to identify technology gaps to inform a technology development and maturation plan. The specific technical objectives focused on delivery of 90 to 100 Wth thermal power and 30 to 40 We electrical power for 336 hours to a representative Commercial Lunar Payload Services (CLPS) lander, to support lunar surface survival and limited operations through a lunar night. The total system mass was targeted at ≤50 kg. A highly exothermic chemical reaction system is used to generate on-board electrical power for spacecraft systems, and thermal power to maintain critical spacecraft/lander systems within their allowable flight temperature (AFTs). Based on the very high energy content of the chemical reaction system, a much higher amount of heat per unit mass can be delivered to the spacecraft, relative to a rechargeable lithium-ion battery and electrical heater(s). Since radioisotope heaters or generators are not used, the system will be orders of magnitude lower in cost than a radioisotope heating/power unit, without the attendant regulatory complexities. As part of the CHIPS concept, a fraction of the thermal power generated is converted to electrical power via an appropriate thermal-to-electric converter technology (such as a free piston Stirling converter or a thermoelectric generator module), to provide power to critical loads. This approach is ideally suited to support operation of commercial landers (e.g., via the CLPS program). In most cases, these landers are only designed to operate during a portion of the lunar day, with no provision for survival through the lunar night. By supporting lunar night survival, a mission can be extended through the lunar night and at least into another lunar day, thus turning a nominal eight-day mission into a 36-day mission. Therefore, the current system demonstration will focus on scalability to support at least 336 hours (one lunar night) of continuous thermal and electrical power generation. Although initially targeted to support lunar equatorial landings, the technology is extensible to missions at the lunar poles, other extreme environments in the Solar System or even air-independent applications on Earth (e.g., ocean exploration).

West, William↗
DOE OSTI2021

Rolled-up electromagnetic component for on-chip applications and method of making a rolled-up electromagnetic component

A rolled-up electromagnetic component for on-chip applications comprises: a multilayer sheet in a rolled configuration comprising at least one turn about a longitudinal axis; a core defined by a first turn of the rolled configuration; and a soft magnetic material disposed within the core, where the multilayer sheet comprises a conductive pattern layer on a strain-relieved layer. A method of making a rolled-up electromagnetic component for on-chip applications includes forming a rolled-up device comprising: a multilayer sheet in a rolled configuration having at least one turn about a longitudinal axis, where the multilayer sheet comprises a conductive pattern layer on a strain-relieved layer; and a core defined by a first turn of the rolled configuration. The method further includes introducing a soft magnetic material into the core.

Li, Xiuling↗
DOE OSTI2024

Scalable DAQ system operating the CHIPS-5 neutrino detector

The CHIPS R&D project focuses on development of low-cost water Cherenkov neutrino detectors through novel design strategies and resourceful engineering. This work presents an end-to-end DAQ solution intended for a recent 5 kt CHIPS prototype, which is largely based on affordable mass-produced components. Much like the detector itself, the presented instrumentation is composed of modular arrays that can be scaled up and easily serviced. A single such array can carry up to 30 photomultiplier tubes (PMTs) accompanied by electronics that generate high voltage in-situ and deliver time resolution of up to 0.69 ns. In addition, the technology is compatible with the White Rabbit timing system, which can synchronize its elements to within 100 ps. While deployment issues did not permit the presented DAQ system to operate beyond initial evaluation, the presented hardware and software successfully passed numerous commissioning tests that demonstrated their viability for use in a large-scale neutrino detector, instrumented with thousands of PMTs.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

Automated Detection of Qubit Structures on Quantum Chips

In this study, YOLO (You Only Look Once), a well-known object detection and image segmentation model, is used to detect qubits on a quantum chip. The model is trained by exposing it to various images of objects of interest and by tweaking various training parameters to allow the model to learn from a limited and highly specialized dataset of SEM imagery. The model was provided with numerous images of qubits and various prominent features of note located on a qubit. These detections were then integrated into a simple GUI, allowing for real-time feedback alongside SEM usage. This will allow us to create various functions enabling automated functions like chip-wide scanning, auto-focusing, and image correction.

Perjuste, Ruth [Wellesley Coll.]↗
DOE OSTI2020

Notch insensitivity in fatigue failure of chopped carbon fiber chip-reinforced composites using experimental and computational analysis

This study focuses on the notch effect on the fatigue failure of chopped carbon fiber chip-reinforced sheet molding compound (SMC) composites by using both experimental and numerical methods. The S-N diagrams of notched specimens are first obtained experimentally, which exhibit large scatter and are shown to depend on the spatial distribution of local fiber orientations. After considering the effect of this spatial distribution by adopting a new fatigue damage parameter to normalize the results, we achieve a much better correlation in the normalized S-N diagram for all the notched specimens with different hole diameters. Next, compared with the fatigue results of smooth specimens without notches, we find that SMC composites under tension-tension fatigue loading exhibit notch-insensitivity, which renders this type of composites a better candidate in joints or similar applications. Meanwhile, the fatigue failure mechanisms of notched SMC composites are explored through a microstructure characterization procedure. On this basis, a computational micromechanics model considering the notch effect and an improved multi-scale progressive damage fatigue law, calibrated by coupon-level fatigue tests of smooth SMC composites under different loading conditions, are employed to predict the fatigue behavior of notched SMC composites. We show that detailed failure processes and fatigue life of notched SMC composites can be efficiently and adequately predicted by this computational framework.

36 MATERIALS SCIENCE↗
DOE OSTI2021

Experimental and computational analysis of bending fatigue failure in chopped carbon fiber chip reinforced composites

With a better balance among good mechanical performance, high freedom of design, and low material and manufacturing cost, chopped carbon fiber chip reinforced sheet molding compound (SMC) composites show great potential in different engineering applications. Here in this paper, bending fatigue behaviors of SMC composites considering the heterogeneous fiber orientation distributions have been thoroughly investigated utilizing both experimental and computational methods. First, four-point bending fatigue tests are performed with designed SMC composites, and the local modulus is adopted as a metric to represent the local fiber orientation of two opposing sides. Interestingly, SMC composites with and without large discrepancy in local modulus of opposing sides show different fatigue behaviors. Interrupted tests are conducted to explore the bending fatigue failure mechanism, and the damage processes of valid specimens are also closely examined. We find that the fatigue failure of SMC composites under four-point bending is governed by crack propagation instead of crack initiation. Because of this, the heterogeneous local fiber orientations of both sides of the specimen influence fatigue life. The microstructure of the lower side shows a direct influence while that of the upper side also exhibiting influence which becomes more prominent for high cycle fatigue cases. Furthermore, a hybrid micro–macro computational model is proposed to efficiently study the cyclic bending behavior of SMC composites. The region of interest is reconstructed with a modified random sequential absorption algorithm to conserve all the microstructural details including the heterogeneous fiber orientation, while the rest of the regions are modeled as homogenized macro-scale continua. Combined with a framework to capture the progressive fatigue damage under cyclic bending, the bending fatigue behaviors of SMC composites are accurately captured by the hybrid computational model comparing with our experimental analysis.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Automated Lane Centering: An Off-the-Shelf Computer Vision Product vs. Infrastructure-Based Chip-Enabled Raised Pavement Markers

Safe autonomous vehicle (AV) operations depend on an accurate perception of the driving environment, which necessitates the use of a variety of sensors. Computational algorithms must then process all of this sensor data, which typically results in a high on-vehicle computational load. For example, existing lane markings are designed for human drivers, can fade over time, and can be contradictory in construction zones, which require specialized sensing and computational processing in an AV. But, this standard process can be avoided if the lane information is simply transmitted directly to the AV. High definition maps and road side units (RSUs) can be used for direct data transmission to the AV, but can be prohibitively expensive to establish and maintain. Additionally, to ensure robust and safe AV operations, more redundancy is beneficial. A cost-effective and passive solution is essential to address this need effectively. In this research, we propose a new infrastructure information source (IIS), chip-enabled raised pavement markers (CERPMs), which provide environmental data to the AV while also decreasing the AV compute load and the associated increase in vehicle energy use. CERPMs are installed in place of traditional ubiquitous raised pavement markers along road lane lines to transmit geospatial information along with the speed limit using long range wide area network (LoRaWAN) protocol directly to nearby vehicles. This information is then compared to the Mobileye commercial off-the-shelf traditional system that uses computer vision processing of lane markings. Our perception subsystem processes the raw data from both CEPRMs and Mobileye to generate a viable path required for a lane centering (LC) application. To evaluate the detection performance of both systems, we consider three test routes with varying conditions. Our results show that the Mobileye system failed to detect lane markings when the road curvature exceeded ±0.016 m -1 . For the steep curvature test scenario, it could only detect lane markings on both sides of the road for just 6.7% of the given test route. On the other hand, the CERPMs transmit the programmed geospatial information to the perception subsystem on the vehicle to generate a reference trajectory required for vehicle control. The CERPMs successfully generated the reference trajectory for vehicle control in all test scenarios. Moreover, the CERPMs can be detected up to 340 m from the vehicle’s position. Our overall conclusion is that CERPM technology is viable and that it has the potential to address the operational robustness and energy efficiency concerns plaguing the current generation of AVs.

33 ADVANCED PROPULSION SYSTEMS↗
NASA NTRS2000

On-chip learning of hyper-spectral data for real time target recognition

As the focus of our present paper, we have used the cascade error projection (CEP) learning algorithm (shown to be hardware-implementable) with on-chip learning (OCL) scheme to obtain three orders of magnitude speed-up in target recognition compared to software-based learning schemes. Thus, it is shown, real time learning as well as data processing for target recognition can be achieved.

on-chip learning Cascade Error Projection real tim↗