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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12

An experimentally validated electro-thermal EV battery pack model incorporating cycle-life aging and cell-to-cell variations

Lithium-ion batteries are used in a wide variety of applications. To meet the power and energy demands of these applications battery packs are composed of hundreds to thousands of cells. The electrical and thermal interactions between cells introduce additional complexity in the pack dynamics. To capture these effects, a battery pack model composed of 192 cells based on a first-generation (2012) Nissan Leaf battery pack is developed in MATLAB/Simulink/Simscape. Here, with this model, we simulate the electrical dynamics (using a first-order equivalent-circuit model), the thermal dynamics (using a first-order lumped-parameter thermal model), and the aging dynamics (using a semi-empirical severity factor-based model) of every cell in the pack and we also create a pack thermal model that explicitly captures the heat exchange between the modules, and the cells contained within, during operation. The models are calibrated and validated, both at the cell and pack level, with experimental data. Two different case studies of this pack model are investigated. In the first case study, an initial, normally-distributed, cell-to-cell capacity variation is introduced and its effect on the pack voltage and module temperatures is studied. In the second case study, we deliberately insert cells with lower than nominal capacity into the pack and we investigate how this type of initial cell-to-cell capacity variation affects the pack’s ability to deliver energy over time. Finally, we also study how parallel-connected cells can reduce the effects of cell-to-cell variations at the expense of increased aging of the pack overall.

25 ENERGY STORAGE↗

High-resolution magnetic microscopy applications using nitrogen-vacancy centers in diamond

Magnetic microscopy with high spatial resolution helps to solve a variety of technical problems in condensed-matter physics, electrical engineering, biomagnetism, and geomagnetism. In this work we used quantum diamond magnetic microscope (QDMM) setups, which use a dense uniform layer of magnetically-sensitive nitrogen-vacancy (NV) centers in diamond to image an external magnetic field using a fluorescence microscope. We used this technique for imaging few-micron ferromagnetic needles used as a physically unclonable function (PUF) and to passively interrogate electric current paths in a commercial 555 timer integrated circuit (IC). As part of the QDMM development, we also found a way to calculate ion implantation recipes to create diamond samples with dense uniform NV layers at the surface. This work opens the possibility for follow-up experiments with 2D magnetic materials, ion implantation, and electronics characterization and troubleshooting.

36 MATERIALS SCIENCE↗

Arc Flash Evaluation Poster

Arc flash evaluation is a key aspect of assessing the safety of an electrical system. An arc flash occurs when a short circuit results in large amounts of unexpected current in a conductor leading to a massive release of energy. By conducting an arc flash evaluation engineers are able to design safer systems and determine the level of protective equipment that a worker needs to wear in order to survive an arc flash incident.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Online Monitoring of Medium Voltage Cable Systems with Spread Spectrum Time Domain and Frequency Domain Reflectometry

In-service failures of wave energy convertor (WEC) cable systems can have a significant cost and power availability impact. Close parallel research 2019 data showed > 1B£ and 9 Terra-Watt-Hours associated with global off-shore wind (OSW) cable failures (Strang-Moran 2020). OSW is a closely related technology but currently is significantly cheaper than WEC technology. For wave energy to compete, the problem of reliable cable transmission must be mitigated. This project develops isolation technology to allow online high frequency reflectometry testing of medium voltage cables (1 to 10 kV and higher) without arcing or damage to the test instrument. Online spread spectrum time domain reflectometry (SSTDR) testing has been established for low voltage cable systems in the aircraft and rail industry and the ability to detect and locate cable flaws of interest is well understood. Extending reflectometry testing to medium voltage systems could enable detection of cable damage before failures occur thereby allowing repair and replacement of damaged cable segments to be scheduled and managed. The seedling project succeeded to pass and receive high frequency SSTDR signals onto a cable up to 1 kV using a parallel trace isolation circuit board that can be connected onto the test cable. The approach used a novel circuit design for which an invention disclosure has been filed. A proposed sapling project would extend the technology toward the higher operating voltages used by WEC systems, thereby enabling online SSTDR cable monitoring. The goal of the seedling project was to extend the capability of the ARENA cable/motor test bed to address medium voltages and to develop a high pass filter isolation architecture to protect the reflectometry instrument from the low frequency (DC – 60 Hz) line voltage while allowing the high frequency diagnostic signal to pass to and from the test instrument to the live line. Initial efforts focused on passive LCR filter circuits to reduce 60 Hz levels below 10 volts from a 10 kV line while allowing the MHz high frequency chirps to pass onto the cables and for mV signals to be detected. We discovered that the parasitic loss behavior of real high voltage components precluded this approach from working. An alternate approach was adapted for the electric field to couple between two parallel traces on a printed circuit board much like a radio-frequency coupler. The challenge here was and is to have the parallel traces close enough to each other to effectively pass the high frequency chirp onto the live line and receive any reflected signal from any encountered impedance change along the cable. This reflected signal will be in the mV range. The traces however must be far enough apart to not allow arcing on the board. A design with 3 mm spacing was determined to allow the high frequency signal to pass onto the live line and receive the mV signal back into the instrument while reducing the 60 Hz voltage amplitude by >80 dB (more than a factor of 10,000) without allowing arcing from across the parallel traces. This was confirmed by simulation and test.

16 TIDAL AND WAVE POWER↗

Radiation-hard miniature optical engine with high bandwidth

Future silicon trackers will be operated in an intense radiation environment and require large volumes of data to be transmitted off detector. In addition, the optical modules must be of low mass in order to limit multiple scattering and nuclear interactions that would degrade the overall performance of the detector. Here, we present a miniature optical engine that satisfies these constraints. The optical engine consists of an ASIC driving a VCSEL (Vertical Cavity Surface Emitting Laser) array in an optical package. Two ASICs are designed to operate a 12-channel VCSEL array at 1.28 or 5.12 Gb/s per channel, which yields a total data rate of up to 60 Gb/s. The core transistors are fabricated in a 65 nm CMOS process which enhance the radiation-hardness. Each channel contains equalizer (CTLE) and clock-data recovery circuits (CDR) so that the ASIC can restore the highly distorted electrical signal after propagating through several meters of cables of small diameter. The equalizer, CDR, and VCSEL driver are configured via a digital I 2 C chip interface with triple redundant memory to mitigate single event upset (SEU) effects. The bias and modulation currents are controlled by a digital-to-analog converter (DAC). We present the design of the circuit together with the results of the simulations and preliminary measurements.

47 OTHER INSTRUMENTATION↗

Low modulation index 3-phase solid state transformer

A solid-state transformer (SST) comprises a transformer core, a primary winding, a secondary winding, a primary-side switch bank, and a secondary-side switch bank. Each of the switch banks includes six 4-quadrant switches. The twelve 4-quadrant switches are toggled on and off over six clock cycles in a repetitive sequence with a period that is a function of a desired operating frequency of the transformer. The sequence is configured such that at any given time, 2 of 3 input and output phases are connected to the primary and secondary windings. The SST further includes L-C filter circuits that are configured to filter high-frequency components of current and voltage waveforms such that these components are not back-fed to the electrical mains or delivered to a load. The SST includes a primary-side filter circuit and a secondary-side filter circuit that can each include respective L-C filters for three input or output phases.

Koplow, Jeffrey P.↗

Maximum power point tracking for a multi-layered piezoelectric heel charger with a levered mechanism toward impact-based energy harvesting

The piezoelectric footstep energy harvester does not always work at its maximum power point when the external load is fixed, as the optimal load changes when the walking excitation alters. Thus, the harvesting efficiency is downgraded largely in real-life scenarios compared to in-lab experiments and theoretical or numerical predictions due to the mismatch between the actual load and the optimal load. To address this issue, the concept of Maximum Power Point Tracking (MPPT) is investigated in this paper and the circuit design is implemented for a multi-layered levered piezoelectric footstep energy harvester (heel charger). The proposed event-driven MPPT circuit interface with a customized buck converter aims to maximize the power gained from daily walking using the heel charger to power a fixed load, such as smart insole or shoes. The MPPT circuit design is conceptually simulated and then tested with the heel charger to further validate if it works at its maximum power point when the frequency of the input excitation alters. Results show that the extracted power from the heel charger connected to a fixed resistance load with MPPT implementation is improved up to 300% compared to the one without MPPT implementation in simulation and up to 180% in the experiment when connected to a fixed load. The difference between simulation and experimental results is due to the optimization of using voltage sources as the heel charger and the control signals (pulse width modulation) from the microcontroller in the simulation.

47 OTHER INSTRUMENTATION↗

Gate-Tunable Single Terahertz Meta-Atom Ultrastrong Light-Matter Coupling

We study the electrical tunability of ultrastrong light-matter interactions between a single terahertz circuit-based complementary split ring resonator (cSRR) and a two-dimensional electron gas. For this purpose, transmission spectroscopy measurements are performed under the influence of a strong magnetic field at different set points for the electric gate bias. The resulting Landau polariton dispersion depends on the applied electric bias, as the gating technique confines the electrons in-plane down to extremely subwavelength dimensions as small as d = 410 nm. This confinement allows for the excitation of standing plasma waves at zero magnetic field and an effective tunability of the electron number coupled to the THz resonator. This allows the normalized coupling strength to be tuned in situ from η = 0.46 down to η = 0.18. This is the first demonstration of terahertz far-field spectroscopy of an electrically tunable interaction between a single terahertz resonator and electrons in a GaAs quantum well heterostructure.

Landau levels↗

Design of Auxiliary Circuit Elements for Achieving Zero Voltage Switching in a Wireless Power Transfer System

The auxiliary resonant commutated pole (ARCP) is being used to achieve zero voltage switching (ZVS) of power switches for improved efficiency and/or to reduce dv/dt at the switch node for better electromagnetic interference (EMI) performance and overall system reliability. This paper shows how an ARCP circuit can be used in a wireless power transfer system to achieve ZVS. Detailed analysis of ARCP circuit operation is presented to determine the requirements for achieving ZVS in the main switches of a wireless electric vehicle charging system. Based on this analysis, a design algorithm is developed to optimize the design of the ZVS assisting circuit components. The designed ARCP achieves soft switching of the MOSFETs in the primary inverter of an 85 kHz, 10 kW series-series compensated, stationary wireless power transfer system.

Saha, Tarak↗

Monolithic optoelectronic circuit design for on-chip terahertz applications

We demonstrate a monolithic coplanar stripline platform for on-chip terahertz (THz) generation, transmission, and detection, addressing key challenges of mode purity, bandwidth, and referencing. Capacitive coupling of the photoconductive generator switch enforces pure odd-mode propagation, increases THz field strength, and extends the operational frequency range, achieving 0.05–1.4 THz. Our architecture enables fully monolithic fabrication with amorphous silicon switches, in situ field referencing, and galvanic isolation between generation and detection. Finite-element simulations and experiments confirm that suppressing parasitic modes improves signal integrity, providing a robust platform for high-fidelity THz spectroscopy, ultrafast electronics, and nanoscale quantum materials research.

Capacitive coupling↗

Xyce Parallel Electronic Simulator Users' Guide (Version 7.2)

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiation-aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase - a message passing parallel implementation - which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

42 ENGINEERING↗

Xyce Parallel Electronic Simulator Users' Guide (V. 7.3)

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers; A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models; Device models that are specifically tailored to meet Sandia's needs, including some radiation-aware devices (for Sandia users only); Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase—a message passing parallel implementation—which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

42 ENGINEERING↗

Xyce Parallel Electronic Simulator Users' Guide Version 7.4

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: • Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. • A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. • Device models that are specifically tailored to meet Sandia’s needs, including some radiation-aware devices (for Sandia users only). • Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase — a message passing parallel implementation — which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

42 ENGINEERING↗

Xyce™ Parallel Electronic Simulator Users' Guide (V.7.9)

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: • Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. • A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. • Device models that are specifically tailored to meet Sandia’s needs, including some radiation-aware devices (for Sandia users only). • Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase — a message passing parallel implementation — which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

42 ENGINEERING↗

Xyce™ Parallel Electronic Simulator Users’ Guide, Version 7.10

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: • Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. • A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. • Device models that are specifically tailored to meet Sandia’s needs, including some radiation-aware devices (for Sandia users only). • Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase — a message passing parallel implementation — which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

97 MATHEMATICS AND COMPUTING↗

High-Q superconducting lumped-element resonators for low-mass axion searches

Low-frequency superconducting lumped-element resonators have recently attracted significant attention in the context of axion dark matter searches. Here, we present the design and implementation of a fixed-frequency superconducting resonator operating near 250 kHz, possessing an inductor volume of ∼1 liter and achieving an unloaded quality factor Q ≈ 2.1 × 10 6 . This resonator represents a significant improvement over the state of the art and informs the design of searches for low-mass axions.

Bosons↗

Harvesting Wave Energy to Power Acoustic Transmitters Using Triboelectric Nanogenerator

Wave energy has the largest reserves and widest distribution among blue energy sources. However, the conversion and utilization of ocean wave energy are challenging. In this work, we developed a contact-separation mode triboelectric nanogenerator (TENG) with a simple structure for harvesting wave energy and powering marine sensors and transmitters and performed detailed electrical characterization under controlled laboratory conditions. A prototype power management circuit (PMC) was implemented to improve the output performance of the TENG. The output from the PMC could charge up a storage capacitor for powering sensors and electronics. Eventually, the TENG was integrated within a water-proof enclosure and tested using a custom-built wave simulator to evaluate the device performance in a more representative scenario. The device sustainably powered up an array of 27 LEDs and was able to charge up a capacitor up to 1.8 V for driving an acoustic transmitter. The results demonstrate that TENG technology shows great promise in harvesting low-frequency ocean wave energy.

Yang, Yang↗

Research and Development of a Ventilation-Integrated Comfort System

From an indoor air quality perspective, the best residential ventilation strategies include filtering outdoor air and distributing that air to all occupied parts of a home. From an energy standpoint, it is desirable that energy be transferred from the exhaust air to the incoming outdoor air to limit heating and cooling impacts. Heat or energy recovery ventilators (HRVs or ERVs) can provide these functions, but researchers have seen many poor installations related to design, installation, and operation and maintenance. More robust ventilation systems may involve an ERV with a dedicated duct distribution system and controls. Such a duct system can be costly to install, and many builders reduce these costs by connecting an ERV to a central heating and cooling duct system. Although this can sometimes be done effectively, researchers have seen consistent challenges with low, inconsistent, or imbalanced flow rates; high electricity consumption; and—of greatest concern—outdoor air short-circuiting or not being delivered to occupied spaces at all. Most ERVs are designed to operate with their own duct system; they are not designed as an add-on to much larger heating, ventilating, and air-conditioning (HVAC) systems. The ventilation-integrated comfort system (VICS) is expressly designed to integrate with low-capacity, efficient, ducted heating and cooling systems. Overall, the latest VICS prototype consumed 40–75 watts (W), including the air handler power, to deliver 50–120 cfm of whole-dwelling ventilation. The large, cross-flow ERV core performed to match manufacturer values (73% winter sensible effectiveness, 64% summer total effectiveness), but further improvements are possible. The VICS system researched and tested during this project will provide efficient, controllable, balanced energy recovery ventilation that is integrated with heating and cooling systems. The integration reduces space and ductwork needed for separate ventilation systems, and there are no compromises to heating, cooling, or ventilation performance. The integrated nature of the device also reduces risks for improper installation and commissioning. Even when using the air handler blower to distribute outdoor air, the total power consumption is lower than that of most available ERV products in the same airflow range. This system has the potential to offer very high-performance ventilation with much smoother and simpler installation than conventional systems.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗